20085ee115C_1_hw_1

# 20085ee115C_1_hw_1 - EE115C Homework#1 Due Date(in class...

This preview shows pages 1–2. Sign up to view the full content.

EE115C – Homework #1 Due Date 10/15/2008 (in class) Problem #1 (a) Using Spectre, generate the family of I-V curves ( help : online Tutorial 1 has detailed instructions on how to do this) for a PMOS transistor with the following parameters: W/L = 1 µ m/100nm Sweep V SD from 0V to 1V in 50mV increments V SG = 0.4V, 0.5V, 0.7V, 1.0V V BS = 0V, 0.5V Use the 90nm model as instructed in Tutorial 1 (from EEWeb > Online Laboratory), use section NN in the transistor model. Plot all I-V curves on one graph and label bias conditions for V SG and V BS . (b) Repeat the simulation for W/L = 3 µ m/300nm Problem #2 Assume the following characteristics for the transistor: µ n C ox =125 µ A/V 2 , λ =0.5V -1 , L eff =50nm, V TN =0.2V, V DD =1.0V, E cn =6V/ µ m in your hand calculations. Three different transistor configurations are shown below with the drawn sizes as shown. (a) For each of the configurations, use Spectre to simulate the current through the device(s) with V G =V OUT =V DD . (b) For each of the configurations, determine the current through the device.

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

### Page1 / 2

20085ee115C_1_hw_1 - EE115C Homework#1 Due Date(in class...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online