20085ee115C_1_hw_1_new_sol2

# 20085ee115C_1_hw_1_new_sol2 - EE115C Homework #1 Due Date...

This preview shows pages 1–3. Sign up to view the full content.

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: EE115C Homework #1 Due Date 10/13/2008 (in class) Problem #1 (10+10) (a) Using Spectre, generate the family of I-V curves ( help : online Tutorial 1 has detailed instructions on how to do this) for a PMOS transistor with the following parameters: W/L = 1 m m/100nm Sweep V SD from 0V to 1V in 50mV increments V SG = 0.4V, 0.5V, 0.7V, 1.0V V BS = 0V, 0.5V Use the 90nm model as instructed in Tutorial 1 (from EEWeb > Online Laboratory), use section NN in the transistor model. Plot all I-V curves on one graph and label bias conditions for V SG and V BS . (b) Repeat the simulation for W/L = 3 m m/300nm Short Channel Length Vs. Long Channel Length We simulated two cases. They have the same W/L ratio but I-V curves are different at the bias conditions. The case with short channel shows finite impedance effect. The long channel device has pretty constant currents at saturation region. Body effect In case of VBS=0.5, we expect threshold voltage has increased due to body effect. The I-V curves show that the on-currents are reduced. Problem #2...
View Full Document

## This note was uploaded on 02/09/2011 for the course EE 115C taught by Professor N/a during the Spring '10 term at UCLA.

### Page1 / 10

20085ee115C_1_hw_1_new_sol2 - EE115C Homework #1 Due Date...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online