115C_1_ee115c_02

# 115C_1_ee115c_02 - EE115C MOS Model and I-V Curves 1 Representation of an NMOS Transistor NMOS Body p Source Drain Gate G n P substrate n S Analog

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1 EE115C MOS Model and I-V Curves

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2 From 115A, you learned Analog Representation already In 115C, we use Digital Representation nn p+ P substrate Source Drain Body Gate NMOS S G D Analog Representation S G D Digital Representation Representation of an NMOS Transistor
3 pp n+ N substrate Source Drain Body Gate PMOS S G D Analog Representation D G S Digital Representation Representation of a PMOS Transistor

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4 Summary of NMOS Transistor Equations V GT = V GS –V TN k’ = μ N C ox V GT > 0 V min = min(V DS ,V DSAT ) If non-velocity saturated, V DSAT = V GT If velocity saturated, V DSAT = min(V GT , E c L) V GT < 0 If not considering leakage, I DS = 0 If considering leakage, V TN is the threshold voltage φ F =(kT/q)ln(N A /n i ) γ is a constant 0 ~e x p , 1 GT D DS ox qV C II n nkT C ⎛⎞ =+ ⎜⎟ ⎝⎠ () ' min min 1 2 D SG T D S W V IkV V V L λ =− + 0 11 2 SB TN T F V VV γ φ = ++
5 Summary of PMOS Transistor Equations V GT = V SG + V TP (recall that V TP is negative) k’ = μ P C ox V GT > 0 V min = min(V SD ,V

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## This note was uploaded on 02/09/2011 for the course EE 115C taught by Professor N/a during the Spring '10 term at UCLA.

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115C_1_ee115c_02 - EE115C MOS Model and I-V Curves 1 Representation of an NMOS Transistor NMOS Body p Source Drain Gate G n P substrate n S Analog

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