LEVEL SHIFTER AND PRIORITY ENCODER-DOCUMENTATION - Dual...

Transducer
Dual input Balanced output differential amplifier
Dual input UnBalanced output differential amplifier
Level shifting stage
Complementary symmetry push-pull amplifier
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DESIGN OF LEVEL SHIFTER AND
PRIORITY ENCODER IN A MODEM
A Project Report Submitted in partial fulfillment of the
Requirements for the award of the degree
BACHELOR OF TECHNOLOGY
IN
ELECTRONICS AND COMMUNICATION ENGINEERING
Submitted by
S.SIRISHA S.HEMANTH.S.S PAVAN KUMAR.G
(06131A0489) (06131A0480) (06131A0464)
Under the Guidance of
Ms.N.S.SINDHUJA, M.Tech.
Assistant Professor
Department of Electronics and Communication Engineering.
GAYATRI VIDYA PARISHAD COLLEGE OF ENGINEERING
Affiliated to J.N.T University, Kakinada, A.P
MADHURAWADA, VISAKHAPATNAM-48
2006-2010
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CERTIFICATE
This is to certify that this project work entitled “LEVEL SHIFTER AND PRIORITY
ENCODER” is a bonafied work of S.SIRISHA, S.HEMANTH.S.S and PAVANKUMAR.G of
IV/IV Electronics and Communication Engineering, Gayatri Vidya Parishad College Of
Engineering, Visakhapatnam-41 affiliated to Jawaharlal Nehru Technological University,
Kakinada during the year 2009-2010 in partial fulfillment of the requirements for the
Award of the Bachelor of Technology in Electronics and Communication Engineering.
Project Guide : Head of the Department :
Ms. N.S.Sindhuja Dr. N.BalaSubrahmanyam
Assist. Professor Professor, HOD
Dept. of ECE Dept. of ECE
G.V.P.C.O.E G.V.P.C.O.E
Visakhapatnam. Visakhapatnam.
EXTERNAL EXAMINER
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ACKNOWLEDGEMENT
We express our deep sense of gratitude and indebtedness to our esteemed Institute “ Gayatri
Vidya Parishad College of Engineering ”, which has provided us an opportunity to fulfill the
most cherished desire to reach our goal.
We owe our project to Ms.N.S.Sindhuja, Assist Professor , Electronics and Communication
Engineering, who has been our project guide, Chief instructor as well as our coordinator. We
sincerely thank her for the support and guidance which she has given us as, without which we
would not have made this effort of our success. Our deep hearted thanks to our beloved Head of
the Department Dr. N.BalaSubrahmanyam and Prof D.S. Murty for being so helpful in
providing us with his valuable advice and timely guidance.
Our deep hearted thanks to all the faculty members of our department for their value based
imparting of theory and practical subjects, which we have put into use in our project.
We are also indebted to the non-teaching staff for their co-operation. We would also like to
thank our friends for their help and support in making our project a success.
S.SIRISHA (06131A0489),
S.HEMANTH.S.S. (06131A0480),
PAVANKUMAR.G (06131A0464).
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ABSTRACT
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ABSTRACT
This present project is a part of the receiving section in a digital
modem. This present project is to design LEVEL SHIFTER and 16 to 4 PRIORITY
ENCODER blocks for the receiver section in MODEM. The encoded data that is being
transmitted is re-encoded in the receiving section using priority encoder. The conceptual
design of the receiver has been done using CADENCE VIRTUOSO and Analog Design
Environment (ADE). The analog environment is the platform on which we simulated the