Lec2_0112

Lec2_0112 - CS M51A/EE M16 Winter'05 Section 1 Logic Design...

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Y. He @ 02/14/11 CSM51A/EEM16-Sec.1 W’05 L2.1 CS M51A/EE M16 Winter’05 Section 1 Logic Design of Digital Systems Lecture 2 Yutao He [email protected] 4532B Boelter Hall January 12 W’05
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Y. He @ 02/14/11 CSM51A/EEM16-Sec1 W’05 L2.2 Outline Administrative Matter Ch 1 Recap Ch 2.1,2.2 - High-Level Spec. of Comb. Systems Ch 2.3 - Data Representation and encoding Summary
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Y. He @ 02/14/11 CSM51A/EEM16-Sec1 W’05 L2.3 Administrative Matter PTE numbers: Available now If you need one, please let me know during the break If you haven’t filled in the questionaire, please do so HW: HW#1 is due on January 18 (Tuesday) You better start it earlier A cover sheet must be attached to your work Class drop-off box The drop-off box A4 is set up in 4428BH
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Y. He @ 02/14/11 CSM51A/EEM16-Sec1 W’05 L2.4 Big Picture of Digital Systems Design Specification Logic Design Physical Design Fabrication Idea
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Y. He @ 02/14/11 CSM51A/EEM16-Sec1 W’05 L2.5 Big Picture of CSM51A Analog Digital Sync. Async. Comb . Seq. System Circuit Logical (Hardware) Systems Logic Design Function Number Systems Boolean Algebra K-Map Truth Table CAD Tools Specification Inputs Outputs Implementation
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02/14/11 CSM51A/EEM16-Sec1 W’05 L2.6 Chapter 2 - Overview Specification: What It Does? High Level
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This note was uploaded on 02/14/2011 for the course CS M51A taught by Professor Ercegovac during the Winter '07 term at UCLA.

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Lec2_0112 - CS M51A/EE M16 Winter'05 Section 1 Logic Design...

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