dp3 cel - ; Virginia Tech * ECE 2504 * Summer 2010 ; Ryan...

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; Virginia Tech * ECE 2504 * Summer 2010 ; Ryan Zanski ; Design Project 3: Array averages ; Last modified: 28 Jun 10 ; ; ===================================================================== ; This Microchip-developed include file defines CPU registers such as ; STATUS as 0x03, FSR 0x04, INDF 0x00, C (carry) bit 0x00, Z (zero) bit ; 0x02 . .. include P16F84.INC ; turn off the watchdog timer to fix odd behavior on long runs. __CONFIG _HS_OSC&_WDT_OFF&_PWRTE_ON&_CP_OFF ; ===================================================================== ; Program specific equate table ; These are user-defined equate statements naming symbolic labels ; specific to ths program. status equ 0x03 ; define status register FSR equ 0x04 ; define FSR location INDF equ 0x00 ; define INDF CARRY equ 0x00 ; define CARRY bit as 0H position z equ 0x02 ; define zero bit w equ 0x00 ; store result in w register f equ 0x01 ; store result in f register ; Define the data storage locations ; input array length equ 0x20
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dp3 cel - ; Virginia Tech * ECE 2504 * Summer 2010 ; Ryan...

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