1-25-11 - MIPS registers register r0 r1 r2-r3 r4-r7 r8-r15...

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MIPS registers register assembly name Comment r0 r1 r2-r3 r4-r7 r8-r15 r16-r23 r24-r25 r26-r27 r28 r29 r30 r31 $zero $at $v0-$v1 $a0-$a3 $t0-$t7 $s0-$s7 $t8-$t9 $k0-$k1 $gp $sp $fp $ra Always 0 Reserved for assembler Stores results Stores arguments Temporaries, not saved Contents saved for later use More temporaries, not saved Reserved by operating system Global pointer Stack pointer Frame pointer Return address
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MIPS insruction formats Instruction “add” belongs to the R-type format . 6 5 5 5 5 6 src src dst add $s1, $s2, $t0 will be coded as 6 5 5 5 5 6 The “function” field is an extension of the opcode, and they together determine the operation. Note that “sub” has a similar format. opcode rs rt rd shift amt function 0 18 8 17 0 32
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Instruction “lw” (load word) belongs to I-type format . 6 5 5 16 base dst offset lw $t0, 32($s3) will be coded as 6 5 5 16 Both “lw” and “sw” (store word) belong to I-format. MIPS has (fortunately) only three different instruction
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This note was uploaded on 02/18/2011 for the course 22C 060 taught by Professor Ghosh during the Spring '11 term at University of Iowa.

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1-25-11 - MIPS registers register r0 r1 r2-r3 r4-r7 r8-r15...

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