04 - mixed logic - 11-Jan-06—9:12 AM11University of...

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Unformatted text preview: 11-Jan-06—9:12 AM11University of Florida, EEL 3701 – File 04© Drs. Schwartz & ArroyoMixed LogicEEL 3701: Digital Logic & Computer Systems1University of Florida, EEL 3701 – File 04© Drs. Schwartz & ArroyoEEL 3701Menu• Mixed-Logic (aka Direct Polarity Indication)Look into my ...EEL 3701: Digital Logic & Computer Systems2University of Florida, EEL 3701 – File 04© Drs. Schwartz & ArroyoEEL 3701Activation Level• The activation levelof a signal is the voltage level at which the signal is considered to be true• Voltage levels are high (H) & low (L); for our chips:>H →+5V >L →0V (ground)• An active-highsignal is defined as a signal that is true when it is at a high voltage (aka high true)>The notation for an active-high signal X is X(H) or X.H• An active-lowsignal is defined as a signal that is true when it is at a low voltage (aka low true)>The notation for an active-low signal Y is Y(L) or Y.L11-Jan-06—9:12 AM22University of Florida, EEL 3701 – File 04© Drs. Schwartz & ArroyoMixed LogicEEL 3701: Digital Logic & Computer Systems3University of Florida, EEL 3701 – File 04© Drs. Schwartz & ArroyoEEL 3701Level Shifters• Level shifters change the activation level of a signal from high to low or from low to highX(H)X(L)Y(L)Y(H)•Logically, a level shifter does nothingto the signal>If a signal is T (F) at the input side it is all T (F) at the output>(Electrically, level shifter complements, H↔L)EEL 3701: Digital Logic & Computer Systems4University of Florida, EEL 3701 – File 04© Drs. Schwartz & ArroyoEEL 3701A Little Boolean Algebra• Let X=/A. • If Y=/X, the Y=/(/A)=A• In words:“The complement of the complement of A is A.”11-Jan-06—9:12 AM33University of Florida, EEL 3701 – File 04© Drs. Schwartz & ArroyoMixed LogicEEL 3701: Digital Logic & Computer Systems5University of Florida, EEL 3701 – File 04© Drs. Schwartz & ArroyoEEL 3701Direct Polarity Indication (Mixed-Logic)• External logic states -vs- internal logic states>Logically, bubble has no effect (it only effects the activation level)>Externally, you must specify signal activation levels, e.g., A(L) or A.L, B(H) or B.H>Internally– Match output activation-levels to input activation-level of gates (specified by bubbles)– Then forget about activation levels!EEL 3701: Digital Logic & Computer Systems6University of Florida, EEL 3701 – File 04© Drs. Schwartz & ArroyoEEL 3701Mixed-Logic•At input and output of gate, bubblefor active-lowand non-bubblefor active-high•Matchbubble to bubble or non-bubble to non-bubble, then variable unchanged (not complemented)•Mismatchin bubble/non-bubble means complement, i.e., A(H)=/A(L), B(L)=/B(H)11-Jan-06—9:12 AM44University of Florida, EEL 3701 – File 04© Drs. Schwartz & ArroyoMixed LogicEEL 3701: Digital Logic & Computer Systems7University of Florida, EEL 3701 – File 04© Drs. Schwartz & ArroyoEEL 3701Mixed-Logic• The voltageon a wire does notchange (due to a bubble on an end), but the logicalinterpretation...
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This note was uploaded on 02/22/2011 for the course ECON 2023 taught by Professor Rush during the Spring '08 term at University of Florida.

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04 - mixed logic - 11-Jan-06—9:12 AM11University of...

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