16 - RAM ROM - 1-Mar-0610:15 AM RAM, ROM EEL 3701 EEL 3701...

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1-Mar-06—10:15 AM 1 1 University of Florida, EEL 3701 – File 16 RAM, ROM EEL 3701 1 University of Florida, EEL 3701 – File 16 EEL 3701 Menu • LSI Components >Random Access Memory (RAM) – Static RAM (SRAM) – Dynamic RAM (DRAM) – Read-Only Memory (ROM) Look into my . .. See figures from Lam text on web: RAM_ROM_ch6.pdf EEL 3701 2 University of Florida, EEL 3701 – File 16 EEL 3701 • It can be thought of as 1 long vector of registers . Each register is given the “name” of its ordered index or location. We call this the address . Addresses are usually given in HEX. [Example] 1 k x 8 RAM word size 000 001 002 3FD 3FE 3FF HEX 0 1 2 . . . 1021 1022 1023 Decimal Location or “Address” # of words 70 1 byte = 8 bits 1K = 1024 bytes = 2 10 bits See also [Lam Fig 6.21, 6.22] [Mano Fig 6.16] Static Random Access Memory(SRAM) • 8 bits = 1 byte, 4 bits = 1 nibble, •1k = 2 10 =1024, M=2 20 (mega-), G=2 30 (giga-), T=2 40 (tera-)
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1-Mar-06—10:15 AM 2 2 University of Florida, EEL 3701 – File 16 RAM, ROM EEL 3701 3 University of Florida, EEL 3701 – File 16 EEL 3701 Postfix Abbr : H = Hexadecimal, B = Binary, O = Octal, and D = Decimal •To address 1k = 2 10 bits, we need 10 “address lines” (A 9 ~A 0 ) •The data needs 8 lines designated as D 7 ~D 0 •Since any of the 1k locations is usable, the address lines A 9 ~A 0 will range from 00 0000 0000B to 11 1111 1111B ( 0 0 0H) to ( 3 F FH) • Any RAM chip will have n Any RAM chip will have n -address lines, m address lines, m -data lines, and a data lines, and a “few few control lines. control lines. • For RAM, For RAM, “control control ” is usually a CE or CS (Chip Enable or Chip is usually a CE or CS (Chip Enable or Chip Select), a WE (Write Enable), a RD (Read) or OE (Output enable), Select), a WE (Write Enable), a RD (Read) or OE (Output enable), etc. etc. • The data lines are usually bi The data lines are usually bi -directional (time directional (time -multiplexed). multiplexed). • To To “save save ” pins, WE may indicate the direction of data travel. pins, WE may indicate the direction of data travel. Static RAM Prefix Abbr : $ = Hexadecimal, % = Binary, @ = Octal EEL 3701 4 University of Florida, EEL 3701 – File 16 EEL 3701 RAM Model • RAM's are said to be volatile ,” i.e. ., information remains while power is “on.” • Typical access times for SRAM are 10 ~ 100ns in CMOS types. Faster (less capacity in bytes) IC technology (TTL, etc.) are
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16 - RAM ROM - 1-Mar-0610:15 AM RAM, ROM EEL 3701 EEL 3701...

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