17 - Moore &amp; Mealy Machines

# 17 - Moore &amp; Mealy Machines - 6-Mar-0610:15 AM...

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6-Mar-06—10:15 AM 1 1 University of Florida, EEL 3701 – File 17 © Drs. Schwartz & Arroyo Moore & Mealy Machines EEL 3701: Digital Logic & Computer Systems 1 University of Florida, EEL 3701 – File 17 © Drs. Schwartz & Arroyo EEL 3701 Menu • State Machine Design >Design example: Sequence Detector (using Moore Machine) >Design example: Sequence Detector (using Mealy Machine) >Implementation Look into my . .. EEL 3701: Digital Logic & Computer Systems 2 University of Florida, EEL 3701 – File 17 © Drs. Schwartz & Arroyo EEL 3701 • Thus, Sequence {011}, {0101}, {01001}, {010001} are acceptable, but {0111} is not. Z is the output; X and CLK are the inputs. X = 0 1 0 0 0 1 0 1 0 . ..... Z = 0 0 0 0 0 1 0 1 0 . ..... CLK= 1 2 3 4 5 6 7 8 9 . ..... [Example] Design a Sequence Detector/Acceptor to accept X = 0 1 0 * 1 where 0 * = { λ (nil), 0, 00, 000, 0000, . ...... } Classical Design STEP 1 : State Diagram - This comes in two flavors: (1) Moore Machine - Outputs depend only on present state (2) Mealy Machine - Outputs depend on state and present inputs

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6-Mar-06—10:15 AM 2 2 University of Florida, EEL 3701 – File 17 © Drs. Schwartz & Arroyo Moore & Mealy Machines EEL 3701: Digital Logic & Computer Systems 3 University of Florida, EEL 3701 – File 17 © Drs. Schwartz & Arroyo EEL 3701 Moore Machine Example Moore Machine : output a function of state only ! 000 S 0 Z=0 Clinton 110 S 5 Z=1 Bush 111 S 3 Z=0 Reagan 011 S 2 Z=0 Ford 001 S 1 Z=0 Carter 010 S 4 Z=1 Nixon Start X=1 X=0 X=0 X=1 X=1 X=0 X=0 X=1 X=0 X=1 X=0 X=1 •Z = g (Q i ), where Q j + = f (Q i , X), for all i and j. Looking for X = 0 1 0 * 1 ( ), (1) (0), (00) . .. (0), (00) . .. (01) (01) (010) (010) (0101), (0101), (01001), . .. (01001), . .. (011) (011) X = input Q 2 Q 1 Q 0 = state bits (assigned later) S i = state # = CBA Z = output Pres. = state name Count so far EEL 3701: Digital Logic & Computer Systems 4 University of Florida, EEL 3701 – File 17 © Drs. Schwartz & Arroyo EEL 3701 (a) Start with a “start” state, S 0 . We receive an input X, and we produce an output Z. If we get X=0, it might be a part of the desired sequence. However, if we get X=1, it is definitely not a part of the desired sequence. We are looking for X=0. Let’s call the state where we got what we want (X=0) S 1 since it will be a different state from the original state. ( S 0 “looking for X=0”, S 1 “we got it.”) The output for S 0 is Z=0 because no detection has taken place. State Machine (SM) Design: Background Looking for X = 0 1 0 * 1 Explanation of the state diagram
6-Mar-06—10:15 AM 3 3 University of Florida, EEL 3701 – File 17 © Drs. Schwartz & Arroyo Moore & Mealy Machines EEL 3701: Digital Logic & Computer Systems 5 University of Florida, EEL 3701 – File 17 © Drs. Schwartz & Arroyo EEL 3701 (b) Now in state S1. We are looking for a 1. If we get it, we might be detecting the sequence. However, if we get a 0, we stay at the state where we are looking for a 1. Call the state where we got the 1 we are looking for S 2 . The output for S 1 is 0 since we’ve not detected all of the sequence yet.

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## This note was uploaded on 02/22/2011 for the course ECON 2023 taught by Professor Rush during the Spring '08 term at University of Florida.

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17 - Moore &amp; Mealy Machines - 6-Mar-0610:15 AM...

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