22 - Combinatorial design techniques

# 22 - Combinatorial design techniques - 6-Apr-064:10 PM...

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6-Apr-06—4:10 PM 1 1 University of Florida, EEL 3701 – File 22 © Drs. Schwartz & Arroyo Various Combinatorial Design Techniques EEL 3701: Digital Logic & Computer Systems 1 University of Florida, EEL 3701 – File 22 © Drs. Schwartz & Arroyo EEL 3701 Menu • Digital Design Techniques - Review >Realization using K-Maps >Realization using MUXes >Realization using PLA & PAL >Realization using ROM >Realization using VHDL Look into my . .. EEL 3701: Digital Logic & Computer Systems 2 University of Florida, EEL 3701 – File 22 © Drs. Schwartz & Arroyo EEL 3701 Digital Design Techniques [Example] Synthesize the following function. A BCDF 00000 00010 00101 00111 01001 01010 01101 01111 10001 10010 10101 10111 11001 11011 11101 11111 F POS = (A+B+C) (A+C+/D) (B+C+/D) F POS (H) A(H) B(H) C(H) D(H) A+B+C A+C+/D B+C+/D

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6-Apr-06—4:10 PM 2 2 University of Florida, EEL 3701 – File 22 © Drs. Schwartz & Arroyo Various Combinatorial Design Techniques EEL 3701: Digital Logic & Computer Systems 3 University of Florida, EEL 3701 – File 22 © Drs. Schwartz & Arroyo EEL 3701 1. Realization using K-Maps You can obtain 2-level logic using K-Maps. AB CD 00 01 11 10 00 0 0 1 1 01 1 0 1 1 11 1 1 1 1 10 1 0 1 1 C B /D A /D F K-Map-MSOP = AB + A /D + B /D + C AB F K-MAP (H) A(H) B(H) C(H) D(H) AB A /D B /D F K-Map-MPOS = (A+B+C) (A+C+/D) (B+C+/D) See circuit of the previous page EEL 3701: Digital Logic & Computer Systems 4 University of Florida, EEL 3701 – File 22 © Drs. Schwartz & Arroyo
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22 - Combinatorial design techniques - 6-Apr-064:10 PM...

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