cs2100-12-MIPS-2

cs2100-12-MIPS-2 - CS2100Computer Organisation

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CS2100 Computer  Organisation http://www.comp.nus.edu.sg/~cs2100/ MIPS Part II: More Instructions (AY2009/2010) Semester 2
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CS2100 MIPS II 2 MIPS PART II: MORE INSTRUCTIONS MIPS Opcodes Memory Access Instructions: Load/Store Arrays Large Constants Branch Instructions Inequalities Array and Loop MIPS Simulator: PCSpim
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CS2100 MIPS II 3 MIPS OPCODES Learn by examples. Focus mainly on those simple ones, such as: load store add subtract move register-register and shift compare equal, compare not equal branch jump call return
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CS2100 MIPS II 4 MIPS The MIPS instruction set is typical of RISC architectures. MIPS is a load-store register architecture 32 registers, each 32-bit (4-byte) long Each word contains 32 bits (4 bytes) Memory addresses are 32-bit long
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CS2100 MIPS II 5 MIPS OPERANDS:  REGISTERS AND MEMORY Name Examples Comments 32 registers $s0-$s7, $t0-$t9, $zero, $a0- $a3, $v0-$v1, $gp, $fp, $sp, $ra, $at Fast locations for data. In MIPS, data must be in registers to perform arithmetic. 2 30 memory words Mem[0], Mem[4], …, Mem[4294967292]. Accessed only by data transfer instructions. MIPS uses byte addresses, so sequential words differ by 4. Memory holds data structures, such as arrays, and spilled registers, such as those saved on procedure calls.
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CS2100 MIPS II 6 MEMORY ACCESS INSTRUCTIONS Only load and store instructions can access memory data. Example: Each array element occupies a word. C code: A[7] = h + A[10]; MIPS code: lw $t0, 40($s3) add $t0, $s2, $t0 sw $t0, 28($s3) Each array element occupies a word (4 bytes). $s3 contains the base address (address of first element) of array A. Remember arithmetic operands (for add) are registers, not memory!
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CS2100 MIPS II 7 LOAD WORD INSTRUCTION Example: lw $t0, 4($s0) 8007 8006 8005 8004 8003 8002 8001 8000 Word at address $s0 + 4 $s0 = 8000 $s0 + 4 Register $t0 Load (read) the content from the memory word at address $s0 + 4 to the register $t0.
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CS2100 MIPS II 8 STORE WORD INSTRUCTION Example: sw $t0, 12($s0) Word at address $s0 + 12 $s0 = 8000 $s0 + 12 Register $t0 Store (write) the content of register $t0 to the memory word at address $s0 + 12. 8015 8014 8013 8012 : 8003 8002 8001 8000 :
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CS2100 MIPS II 9 OTHER LOAD/STORE INSTRUCTIONS (1/2) Besides the load word ( lw ) and store word ( sw ) instructions, there are also the load byte ( lb ) and store byte ( sb ) instructions. Similar in format: lb $t1, 12($s3) sb $t2, 13($s3) Similar in working except that one byte, instead of one word, is loaded or stored.
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CS2100 MIPS II 10 OTHER LOAD/STORE INSTRUCTIONS (2/2) MIPS disallows loading/storing a word that crosses the word boundary. Use the unaligned load word ( ulw ) and unaligned store word ( usw ) instructions instead. These are pseudo- instructions. There are other instructions such as
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cs2100-12-MIPS-2 - CS2100Computer Organisation

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