cs2100-18-Cache-2

cs2100-18-Cache-2 - CS2100Computer Organisation Cache II...

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CS2100 Computer  Organisation http://www.comp.nus.edu.sg/~cs2100/ Cache II (AY2009/2010) Semester 2
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CS2100 Cache II 2 CACHE II Type of Cache Misses Direct-Mapped Cache: Conflict Set Associative Cache Fully Associative Cache Block Replacement Policy Cache Framework Improving Miss Penalty Multi-Level Caches Virtual Memory (Non-examinable)
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CS2100 Cache II 3 RECAP: QUESTION 1 A 128-byte direct-mapped cache has 32-byte cache blocks. How many cache blocks are there? How many bits for cache index? How many bits for block offset? How many bits for tag? a
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CS2100 Cache II 4 RECAP: QUESTION 2 Memory Block Number Address Direct Mapped Cache 8-byte blocks Memory 0 1 2 3 Cache Index 0 1 2 3 4 5 6 7 0-3 4-7 8-11 12-15 16-19 20-23 24-27 28-31 Take address 16 What is the memory block number? What is block offset? What is cache index? What is Tag? Address 16: ?
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CS2100 Cache II 5 RECAP: QUESTION 3 Memory Block Number Address Direct Mapped Cache 8-byte blocks Memory 0 1 2 3 Cache Index 0 1 2 3 4 5 6 7 0-3 4-7 8-11 12-15 16-19 20-23 24-27 28-31 Take address 36 What is the memory block number? What is block offset? What is cache index? What is Tag? Address 36: ?
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CS2100 Cache II 6 TYPES OF CACHE MISSES Cold/Compulsory Miss : First time a memory address is accessed Cold fact of life; not much we can do about it Solution: Increase cache block size Conflict Miss : Two or more distinct memory blocks map to the same cache block Big problem in direct-mapped caches Solution 1: Increase cache size Inherent restriction on cache size due to SRAM technology Solution 2: Set-Associative caches (coming next . .) Capacity Miss : Due to limited cache size Capacity Miss goes away if cache size can be increased to fully accommodate working sets Vague definition for now; will become clear when we discuss fully associative caches
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CS2100 Cache II 7 BLOCK SIZE TRADEOFF (1/2) In general, larger block size takes advantage of spatial locality BUT : Larger block size means larger miss penalty: Takes longer time to fill up the block If block size is too big relative to cache size, miss rate will go up Too few cache blocks Average access time = Hit rate × Hit Time + (1-Hit rate) × Miss penalty Miss Penalty Block Size Miss Rate Exploits Spatial Locality Fewer blocks: compromises temporal locality Average Access Time Block Size Block Size
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CS2100 Cache II 8 BLOCK SIZE TRADEOFF (2/2) 0 5 10 8 16 32 64 128 256 Block size (bytes) Miss rate (%) 8 KB 16 KB 64 KB 256 KB
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CS2100 Cache II 9 DIRECT-MAPPED CACHE:  CONFLICT Lots of people whose last name start with L Cannot cache both Jin Wei and Nicholas What if you need both Jin Wei and Nicholas repeatedly? Frequent cache misses Solution: Add more slots for each alphabet Find LEE Nicholas A B Z L It’s LEE Jin Wei
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CS2100 Cache II 10 SET ASSOCIATIVE CACHE (1/2) Two slots for each alphabet Can cache both Jin Wei and Nicholas Search both the slots in parallel Find LEE Nicholas LEE Jin Wei A B Z L LEE Nicholas
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CS2100 Cache II 11
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cs2100-18-Cache-2 - CS2100Computer Organisation Cache II...

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