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q2

q2 - 1 2 3 MASSACHUSETTS INSTITUTE OF TECHNOLOGY DEPARTMENT...

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M A S S A C H U S E T T S I N S T I T U T E O F T E C H N O L O G Y DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE 6.004 Computation Structures Fall 2010 Quiz #2: October 15, 2010 Name Athena login name Score TA: Caitlin, 26-322 WF 10 WF 11 TA: Quentin, 34-303 WF 11 WF 12 TA: W W : Sabrina, 34-304 WF 12 WF 1 TA: : Steve, 34-303 WF 2 Problem 1 (5 points): Quickies and Trickies (1 point each) (A) A combinational circuit C, built entirely from 2-input NAND gates having a propagation delay of 2ns, has a propagation delay of 20ns. You pipeline C for maximum thruput using the minimum number of registers necessary; the registers have 1ns setup time and 1ns propagation delay. What would you expect for the latency of the resulting pipeline? Answer “None” if you can’t tell from the information given. Latency of pipelined version, or “None”: ____________________ (B) If we account for fanin limitations but ignore wire delays, what is the asymptotic latency of the fastest combinational N-input AND circuit we can build? Asymptotic latency of N-input AND, or “None”: Θ (____________________) (C) Is Θ (log 2 N) the same as Θ (log 10 N) ? Circle best choice: YES ... NO ... only for some N (D) Putting latches on the shared A and B data inputs to the arithmetic, boolean, shifter, and comparator units of an ALU may improve 1) Latency 2) Reliability 3) Throughput 4) Power dissipation 5) None of the above Select best choice: _____ (E) True or False: It is impossible, in theory, to build a 100% reliable bounded-time, bounded-error analog voltage comparator. Circle best choice: TRUE ... FALSE 6.004 Fall 2010 - 1 of 7 - Quiz #2 1 2 3 / 5 / 19 / 6 / 30
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Problem 2 (19 points): Comparative Anatomy MaxOut is a Cambridge startup whose products are binary comparators which determine the largest of several unsigned binary integers. A building block common to all MaxOut products is the combinational CBit module depicted to the left. Each CBit module takes corresponding bits of two unsigned binary numbers, A and B, along with two C in bits from higher-order CBit modules. Its output bit, R, is the appropriate bit of the larger among A and B, as determined from these inputs; it passes two C out bits to lower-order CBit modules.
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