Class 6 Linear and Nonlinear Oscillators

Class 6 Linear and Nonlinear Oscillators - Electronics...

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Electronics Laboratory C ESE 324 Lecture 6 Emre Salman Stony Brook University

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1) Lab Sessions: - Lab 4 is on March 14 and March 15 - Lab report 3 is due on March 14 and March 15 - Midterm is on March 24 Announcements
Review of the Last Lecture

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Average Current Approximation vs. Time Domain Analysis Average current approximation neglects the variation of current between the beginning and end of the transition Rough, first order approximation of the delay In reality, we need to take the derivative of voltage to estimate the current in time domain Current changes as the output voltage changes during the transition
Input – Output Voltage Waveforms (High-to-Low Transition) Two operating regions for the NMOS transistor Starts in the saturation region When the output voltage falls below Vdd – Vth, NMOS starts to conduct in the linear region

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Overall High-to-Low Propagation Delay
Low-to-High Delay Calculation Low-to-high delay calculation is analogous to high-to-low delay calculation In this case NMOS is cut off (assuming a step input), load capacitance is charged up by the PMOS transistor

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Balanced Propagation Delay It is desirable to have equal low-to-high and high-to-low propagation delays Sufficient conditions: This is why PMOS devices are typically sized about three times larger than an NMOS device ) (or , , n p n p p n p T n T w w k k V V
Step Input Assumption We have assumed that the input is a step function Thus, when calculating high-to-low delay PMOS is cut off and PMOS current is zero When calculating low-to-high delay NMOS is cut off and NMOS current is zero What if input is a ramp function with finite rise and fall times? More complicated analysis since

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This note was uploaded on 03/16/2011 for the course ESE 324 taught by Professor Sussman-fort,s during the Spring '08 term at SUNY Stony Brook.

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Class 6 Linear and Nonlinear Oscillators - Electronics...

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