CompArch-Lec05-Control

CompArch-Lec05-Control - COSC3330 Computer Architecture...

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Lecture 5. Control, and RISC vs. CISC COSC3330 Computer Architecture Instructor: Weidong Shi (Larry), PhD Computer Science Department University of Houston
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Topics MIPS Program Execution RISC vs. CISC
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Program Execution on Processors How a program is executed on a processor? How instructions ordering are maintained? Are there times we need to change the flow of a program? How to handle change of flow of a program?
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Program Counter How a sequence of instructions are fetched and executed by a computer? Program Counter (PC) s A special register s Provide the logical ordering of a program s Point to the address of the instruction to be executed main: la $8, array lb $9, ($8) lb $10, 1($8) add $11, $9, $10 sb $11, ($8) addiu $8, $8, 4 lh $9, ($8) lhu $10, 2($8) add $11, $9, $10 sh $11, ($8) addiu $8, $8, 4 lw $9, ($8) lw $10, 4($8) sub $11, $9, $10 sw $11, ($8) PC
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Program Counter Control 32-bit PC Register System clock + 4 32 32 32 2 k x32 INSTRUCTION MEMORY 32 Data (i.e. instruction) Instruction Register
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Change of Flow Scenarios Our current default default mode mode s Program executed in sequential sequential order When a program will break the sequential property? s Subroutine Call and Return s Conditional Jump (with Test/Compare) s Unconditional Jump MIPS R3000/4000 uses s Unconditional absolute instruction addressing s Conditional relative instruction addressing
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Absolute Instruction Addressing The next PC address is given as an absolute value s PC address = <given address> Jump class examples s J LABEL s JAL LABEL s JALR $r s JR $r main: la $8, array lb $9, ($8) lb $10, 1($8) add $11, $9, $10 sb $11, ($8) j Label2 ... ... Label2: addiu $8, $8, 4 lh $9, ($8) lhu $10, 2($8)
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Absolute Addressing Example J Label2 J Label2 s Encoding: Label2=0x00400048 J opcode= (000010) 2 Encoding=0x8100012 s Temp = <Label2 26-bit addr> s PC = PC 31. .28 || Temp || 0 2 main: la $8, array lb $9, ($8) lb $10, 1($8) add $11, $9, $10 sb $11, ($8) j Label2 ... ... Label2: addiu $8, $8, 4 lh $9, ($8) lhu $10, 2($8)
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Relative Instruction Addressing An offset relative to the current PC address is given instead of an absolute address s PC address = <current PC address> + <offset> Branch class examples s bne $src, $dest, LABEL s beq $src, $dest, LABEL s Note that there is no blt instruction, that’s why slt is needed. To facilitate the assembly programming, there is a blt blt pseudo op pseudo op that programmers can use.
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Relative Addressing Example • beq beq $20,$22,L1 $20,$22,L1 s Encoding=0x12960004 s Target=(offset 15 ) 14 || offset || 0 2 s PC = PC + Target la $8, array beq $20, $22, L1 lb $10, 1($8) add $11, $9, $10 sb $11, ($8) L1: addiu $8, $8, 4
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beq $20, $22, L1 Offset Value = (Target addr – beq addr)/4 = # of instructions in-between including beq instruction rt rs 0 1 0 0 1 0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 Encoding = 0x12960004 0 1 0 0 1 0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 31 opcode rs rt 26 25 21 20 16 15 0 Offset Value Branch to L1 if $20==$22
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CompArch-Lec05-Control - COSC3330 Computer Architecture...

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