{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

CompArch-Lec05-Control - COSC3330 Computer Architecture...

Info icon This preview shows pages 1–13. Sign up to view the full content.

View Full Document Right Arrow Icon
Lecture 5. Control, and RISC vs. CISC COSC3330 Computer Architecture Instructor: Weidong Shi (Larry), PhD Computer Science Department University of Houston
Image of page 1

Info icon This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Topics MIPS Program Execution RISC vs. CISC
Image of page 2
Program Execution on Processors How a program is executed on a processor? How instructions ordering are maintained? Are there times we need to change the flow of a program? How to handle change of flow of a program?
Image of page 3

Info icon This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Program Counter How a sequence of instructions are fetched and executed by a computer? Program Counter (PC) square4 A special register square4 Provide the logical ordering of a program square4 Point to the address of the instruction to be executed main: la $8, array lb $9, ($8) lb $10, 1($8) add $11, $9, $10 sb $11, ($8) addiu $8, $8, 4 lh $9, ($8) lhu $10, 2($8) add $11, $9, $10 sh $11, ($8) addiu $8, $8, 4 lw $9, ($8) lw $10, 4($8) sub $11, $9, $10 sw $11, ($8) PC
Image of page 4
Program Counter Control 32-bit PC Register System clock + 4 32 32 32 2 k x32 INSTRUCTION MEMORY 32 Data (i.e. instruction) Instruction Register
Image of page 5

Info icon This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Change of Flow Scenarios Our current default default mode mode square4 Program executed in sequential sequential order When a program will break the sequential property? square4 Subroutine Call and Return square4 Conditional Jump (with Test/Compare) square4 Unconditional Jump MIPS R3000/4000 uses square4 Unconditional absolute instruction addressing square4 Conditional relative instruction addressing
Image of page 6
Absolute Instruction Addressing The next PC address is given as an absolute value square4 PC address = <given address> Jump class examples square4 J LABEL square4 JAL LABEL square4 JALR $r square4 JR $r main: la $8, array lb $9, ($8) lb $10, 1($8) add $11, $9, $10 sb $11, ($8) j Label2 ... ... Label2: addiu $8, $8, 4 lh $9, ($8) lhu $10, 2($8)
Image of page 7

Info icon This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Absolute Addressing Example J Label2 J Label2 square4 Encoding: Label2=0x00400048 J opcode= (000010) 2 Encoding=0x8100012 square4 Temp = <Label2 26-bit addr> square4 PC = PC 31..28 || Temp || 0 2 main: la $8, array lb $9, ($8) lb $10, 1($8) add $11, $9, $10 sb $11, ($8) j Label2 ... ... Label2: addiu $8, $8, 4 lh $9, ($8) lhu $10, 2($8)
Image of page 8
Relative Instruction Addressing An offset relative to the current PC address is given instead of an absolute address square4 PC address = <current PC address> + <offset> Branch class examples square4 bne $src, $dest, LABEL square4 beq $src, $dest, LABEL square4 Note that there is no blt instruction, that’s why slt is needed. To facilitate the assembly programming, there is a blt blt pseudo op pseudo op ” that programmers can use.
Image of page 9

Info icon This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Relative Addressing Example beq beq $20,$22,L1 $20,$22,L1 square4 Encoding=0x12960004 square4 Target=(offset 15 ) 14 || offset || 0 2 square4 PC = PC + Target la $8, array beq $20, $22, L1 lb $10, 1($8) add $11, $9, $10 sb $11, ($8) L1: addiu $8, $8, 4
Image of page 10
BEQ Encoding (I-Format) beq $20, $22, L1 Offset Value = (Target addr – beq addr)/4 = # of instructions in-between including beq instruction rt rs 0 1 0 0 1 0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 Encoding = 0x12960004 0 1 0 0 1 0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 31 opcode rs rt 26 25 21 20 16 15 0 Offset Value Branch to L1 if $20==$22 Offset = 4 instructions la $8, array beq $20, $22, L1 lb $10, 1($8) add $11, $9, $10 sb $11, ($8) L1: addiu $8, $8, 4
Image of page 11

Info icon This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
Relative Addressing Example The offset can be positive as well as negative L2: addiu $20, $22, 4 lw $24, ($22) lw $23, ($20) beq $24, $23, L2 0 1 0 0 1 1 0 0 0
Image of page 12
Image of page 13
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}