NOTES ON SPI and I2C drivers

NOTES ON SPI and I2C drivers - N OTES ON SPI and I2C...

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NOTES ON SPI and I2C drivers: Both SPI and I2C are communication buses that are commonly used in Embedded Systems. Both buses transmit data serially and have masters and slaves. The SPI bus is a full duplex serial synchronous bus that is often called the 3-wire or 4-wire bus due to the need of a minimum of 3 or 4 wires depending on the system architecture. The first 3 wires of the SPI bus are MOSI (Master-out, Slave-in), MISO (Master-in, Slave-out), and SCK (Clock). The 4 th wire in the SPI bus is the CS signals (chip-select for each slave device). The master is usually a microcontroller such as the LPC2148 and the slaves are the peripherals, such as the MP3 Decoder, SD-Card, and the SPI-Flash. The master drives the clock to exchange data and SPI can reach over half the clock speed of the processor, so at 48Mhz (LPC2148 PCLK), you can exchange information at the rate of 24Mhz, or 24Mbps theoretically. There are two basic architectures of the SPI bus. The first architecture involves multiple slave devices with individual chip select signals. For example, if the LPC2148 only wants to transmit information to SPI-Flash, it will assert the CS signal of the SPI Flash, perform SPI transactions with it, and deassert the SPI-Flash CS to end the transaction. The other SPI bus architecture involves daisy-chaining multiple devices on to the SPI bus such as shift registers. Not all SPI devices will work in both configurations so it is up to you to design and implement the correct architecture for your application. The I2C bus is a half duplex multi-master serial synchronous bus that is often called the 2-wire bus. The first wire is SDA (data) and is bidirectional. This means both the master and the slave talks to each other by toggling the same pin. The second wire is SCL (clock) and is only driven by the master but can be held if the slave device requires more time. There is no CS signal and slave addressing, handshaking, and collision handling are built into the bus protocol itself. Addressing, handshaking, and collision handling are based on the I2C’s requirement of using open drain/collector pins and pull up resistors. The master and slave toggle the SDA and SCL to ground to communicate. This allows for multiple devices to be on the same bus. Addressing, handshaking, and collision handling details can be further examined in the I2C tutorial link down below. Furthermore, I2C usually works at a very slow rate, which is either 100khz or 400khz officially. Although one can use faster rate, it is not guaranteed and it deteriorates quickly based on the number of slaves. In conclusion, I2C is slow, but very flexible since only two wires are needed to interface to multiple devices. Your MP3 Development board contains many peripherals and you can communicate to each one
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This note was uploaded on 03/21/2011 for the course CMPE 242 taught by Professor Kat during the Spring '11 term at San Jose State University .

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NOTES ON SPI and I2C drivers - N OTES ON SPI and I2C...

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