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w6-four - Assembly level Programming 198:211 Computer...

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1 1 198:211 Computer Architecture z Topics:Chapter 3 z Assembly Language 3.2 z Register Transfer 3.4 z ALU 3.5 Lecture 8 Fall 2009 2 Assembly level Programming z We are now familiar with high level programming languages such as C and Java z Computers execute machine code z Compilers generate machine code from source code z We need to understand how the code actually executes on various machines (architectures) z Studying binary code is not very easy z At the same time, we need a language that mimics the machine level instructions and still readable (textual format) z Enter Assembly: compilers can generate an intermediate step of code called assembly code z Assemblers then convert assembly code to machine code 3 (recall) Von Neumann Architecture z Model of a computer that used stores programs z Both Data and Program stored in memory z Allows the computer to be “Re-programmed” z CPU is central to the computer Control Unit Arithmetic and Logic (ALU) Output Unit Memory Unit CPU Data Control Input Unit 4 Simplified hardware view MAR MDR C MAR: Memory Address Register also known as Program Counter MDR: Memory Data Register C: Control Switch; 0 is Load Or 1 is Store Store: Store contents of MDR to Memory address specified by MAR Load: Load into MDR contents of Memory address specified by MAR
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2 5 Assembly programmer view z ALU: Arithmetic Logic Unit z IR: Instruction register z GPR: General Purpose Registers z PC: Program Counter z SP: Stack Pointer z BR: Base Register ALU GPR Status Flags SP PC Memory Object Code Data IR BR 6 Fetch-execute cycle z Notation: [X] or (X) contents stored at location (memory address) contained in Register X z IR executes the instructions z As part of the execution data may be transferred among various registers in the CPU as well as memory z Typical data movement instruction is MOV IR Í [PC] Execute [IR] PC Í PC +1 7 MOV instruction z Most common instruction is data transfer instruction z Notation: mov S, D (contents of S becomes contents of D) z mov data from memory to register and register to memory z mov data between registers z Notation: registers are preceded by % sign z mov data to and from stack z mov constants to registers z Notation: constant preceded by $ 8 Data formats z Data is represented in different sizes z Byte … 8 bits z E.g., Char z Word . . 16 bits (2 bytes) z E.g., Short int z Double Word (long or dword). . 32 bits ( 4 bytes) z E.g., float z QWORD . . 64 bits (8 bytes) z E.g., double z Instructions can operate on any data size z movl, movw, movb z Operates on doubleword, word, byte respectively
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3 9 Bit and byte order Little-endian 10 x86 General purpose registers (8) EDI ESI ESP --Stack Pointer EBP --- Base register BL BH EBX BX DL DH EDX DX CL CH ECX CX AL AH EAX AX 16 BITS 32 BITS 8 BITS 11 Registers z Registers are 32 bit (operations can access 16 bits, 8 bits within the register) z Operations involving registers are typically single cycle (nano seconds)… z Types of registers z Data registers (EAX, EBX, ECX, EDX)
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This note was uploaded on 03/24/2011 for the course CS 211 taught by Professor Chakraborty during the Spring '08 term at Rutgers.

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w6-four - Assembly level Programming 198:211 Computer...

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