aLec05_Ports - Introduction to Embedded Microcomputer...

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Introduction to Embedded Microcomputer Systems Lecture 5.1 Jonathan W. Valvano Recap 9S12 Architecture, registers Execution thinking about simplified bus cycles Memory map: I/O, RAM, EEPROM Overview Continuation of execution Stack Subroutines Parallel port, direction registers Start with first question of Worksheet 5 Question 1 . What are the six phases of execution? 2.4. Simplified 9S12 Machine Language Execution Figure 2.6. Block diagram of a simplified 9S12 computer. The bus interface unit (BIU) reads data from the bus during a read cycle, writes data onto the bus during a write cycle. always drives the address bus and the control signals effective address register (EAR) contains the data address The control unit (CU) (EE306, EE360M, EE360N) orchestrates the sequence of operations issues commands to ALU, BIU instruction register (IR) contains the op code The registers high-speed storage devices located in the processor do not have addresses like regular memory specific functions explicitly defined by the instruction Accumulators contain data (A, B, D) Index registers contain addresses (X, Y) Program counter (PC) points to instruction to execute next Stack pointer (SP) points to the top element on the stack ± context switch when calling and returning from a function ± pass parameters ± save temporary information ± implement local variables Condition code register (CCR) the status of the previous operation The arithmetic logic unit (ALU) Arithmetic operations ± Addition ± Subtraction ± Multiplication ± Division Logic operations ± And ± Or ± Exclusive or ± Shift Bus Memory I/O ports Address Data R/W 9S12 Registers Control unit ALU Bus interface unit Processor IR PC EAR A 16 8
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Introduction to Embedded Microcomputer Systems Lecture 5.2 Jonathan W. Valvano The bus address where or which module data what control when and direction A read cycle copies data from RAM, ROM or input device into the processor. A write cycle copies data from the processor into RAM, or output device. Phase Function R/W Address Comment 1 Op code fetch read PC++ Put op code into IR Operand fetch read PC++ Immediate or calculate EA 2 Decode instruction none Figure out what to do 3 Evaluation address none Determine EAR 4 Data read read SP,EAR Data passes through ALU, 5 Free cycle read PC/SP/$FFFF ALU operations, set CCR 6 Data store write SP,EAR Results stored in memory Question 2. Assume this listing file output $5000 B60258 ldaa $0258 Part a) What addressing mode is it? Part b) What happens when it executes?
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This note was uploaded on 03/28/2011 for the course EE 16345 taught by Professor Yerraballi during the Spring '11 term at University of Texas at Austin.

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aLec05_Ports - Introduction to Embedded Microcomputer...

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