4_组合逻辑设è®&iexcl

4_组合逻辑设计

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1/ Outline • Analyze the Logic Circuits • Synthesis using Logic Gates • Hazards & Glitches • Logic Design using MSI • Logic Design using PLD
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2/ Outline • Introduction • Design for MSI and Design Implementation with MSI – Adders – Decoders – Multiplexers
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3/ Introduction • Design Procedure • Basic Logic Components
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4/ Design Procedure
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5/ Design with available building blocks • Design with fixed logic (mentioned) • Design with MSI – Adders – Decoders – Multiplexers • Design with PLD
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6/ Adder Design • Half Adders • Full Adders • Multi-bit Adders • BCD Adder
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7/ Half Adders • Definition logically – A: augend – B: addend – S: sum 0 1 1 1 0 1 1 1 0 0 0 0 S B A Can't simplify S=A B+AB =A B
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8/ Full Adders • Definition logically – Ai: augend at i bit – Bi: addend at i bit – Ci: carry-in from i-1 bit – Si: sum at i bit – Ci+1: carry-out to i+1 bit
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9/ Truth Table 1 1 1 1 1 1 0 0 1 1 1 0 1 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 0 1 1 0 0 0 0 0 0 0 C i+1 S i C i B i A i
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10/ Simplification with K-maps 1 ii i i i i i CB C A B A C + = ++ 1 0 1 0 0 0 1 0 1 1 00 01 10 11 B i C i A i 0 1 0 0 0 1 1 1 0 1 00 01 10 11 B i C i A i i i i i i i i i C B A C B A C B A C B A S i i i i i + + + = ' ' ' ' ' '
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11/ i A i B i C i A i B i C Logic Circuits
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12/ Advanced Logic Functions 1 () ( ) ii i i i i i i i i i i i i i i i i i iii i CA B C A B C A B C A B C AB AB C C PC G PA B G A B + =+++ =+ + + =⊕ = i i i i i i i S ABC A B B B B C C C C C ABCP C ++ +⊕ =⊕⊕ =
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4_组合逻辑设计

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