DIC_Lecture3_Inverter_304305142

DIC_Lecture3_Inverter_304305142 - The CMOS Inverter Leibo...

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The CMOS Inverter eibo IU( 雷波 Leibo LIU( 刘雷波 ) Division of IC & System Design, IMETU [email protected] [email protected] Sep. 30, 2010
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Chapter Outline . troduction 1. Introduction 2. Static Behavior 3. Dynamic Behavior ower Dissipation 4. Power Dissipation 5. Summary 6. Textbook Reference Sep. 30, 2010 2 The CMOS Inverter
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1. Introduction Sep. 30, 2010 3 The CMOS Inverter
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1. Introduction: Circuit and Layout of a CMOS Inverter V DD N Well PMOS S S Contacts DD olysilicon In Out Metal 1 D Polysilicon S S D GND NMOS Sep. 30, 2010 4 The CMOS Inverter a Circuit b Layout
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1. Introduction: Connections between Two Inverters Connected y Metal by Metal Sharing the same V DD and GND Sep. 30, 2010 5 The CMOS Inverter a Circuit b Layout
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1. Introduction: Switch model for Static Behavior Analysis V DD V DD R p ut = V DD V out out R n = GND V in = V DD V in = 0 Sep. 30, 2010 6 The CMOS Inverter Switch model of CMOS inverter for Static Behavior Analysis
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1. Introduction: Switch Model for Dynamic Behavior Analysis V DD V DD R p = V DD ut V ut V out out C L C L R n = GND V in = V DD V in = 0 (a) Output from low to high (b) Output from high to low Sep. 30, 2010 7 The CMOS Inverter Switch model of CMOS inverter for Dynamic Behavior Analysis
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1. Introduction: Important properties of CMOS Inverter 1. The high and low output levels equal V DD and GND, which sults in high noise margins. results in high noise margins. CMOS Inverter, V OH = V DD V OL = GND, High Noise Margins Pseudo-NMOS Inverter, V OH = V DD V OL > GND Low Noise Margins Sep. 30, 2010 8 The CMOS Inverter Voltage Swing = Supply Voltage g Voltage Swing != Supply Voltage
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1. Introduction: Important properties of CMOS Inverter 2. Ratioless Logic ogic levels are not dependent upon the relative device size so 9 Logic levels are not dependent upon the relative device size, so that transistors can be minimum size 9 Transition from one state to the other does not depend on the relative device size V DD oltage Swing Supply Voltage Q Q M4 M2 Voltage Swing = Supply Voltage 0 1 0 1 Clk Clk 1 3 M6 M8 Should cautiously design individual device ratio of M 7-8 to M 4 , as well as M 5-6 to M 2 , so as to make sure that the RS 1 1 SR M1 M3 M5 M7 flip-flop can toggle correctly 0 0 Sep. 30, 2010 9 The CMOS Inverter Ratioed “Clocked” RS Flip-Flop
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