A COMPARATIVE STUDY OF DIGITAL XA MODULATORS
FOR FRACTIONALN SYNTHESIS
Keliu Shu, Edgar SanchezSinencio, Franco Maloberti and Udaykiran Eduri
Department of Electrical Engineering, Texas A&M University
College Station, TX, 77843, USA
[
keliu, Sanchez, franco, kiran) @ee.tamu.edu
Abstract:
This paper investigates the design of digital
ZA
modulator (SDM) for fractionalN frequency
synthesis. The design considerations are presented.
Characteristics of digital
ZA
modulators compared
with
their
analog
counterparts
are
addressed.
Simulation results of 4 types of digital SDMs are
presented. The pros and cons of each topology are
discussed in detail. Design guidelines of digital SDMs
for
fractionalN
synthesizers are given
by
this
comparative study.
1. INTRODUCTION
Frequency synthesizers are widely used as local
oscillators
for
frequency
translation
in
wireless
communications. The principle limitation of an integer
N frequency synthesizer is that its frequency resolution
is equal to the PLL reference frequency. FractionalN
approach eliminates this limitation, but the fractional
spur, is a big concern. Sigmadelta noise shaping
technique is applied to fractionalN
synthesis to
achieve
arbitrarily fine frequency
resolution
and
suppress or eliminate the fractional spur [1][91.
There are various topologies for analog SDMs used
in data converters.
Similarly, there are different
topologies of digital
SDMs
for synthesizers.
A
large
number of publications on the design of analog
CA
modulators can be found in the literature [lo][12].
However, little attention has been paid to the design of
digital ones [13][14]. This paper compares different
digital SDMs and provides useful guidelines for
architecture designers. Section 2 deals with the design
consideration
of
digital
EA
for
fractionalN
synthesizers.
In
section
3,
different
design
considerations of digital SDMs in comparison with
analog SDMs are pointed out. Several topologies of
digital SDMs are
evaluated
in
terms
of
their
performances in this special application. Conclusions
including an explicit comparison table are given in
section 4.
2. DESIGN CONSIDERATIONS
Figure 1 shows the concept of
ZA
fractionalN
synthesizer.
A
digital SDM is used to control the
frequency division ratio in the PLL. The instantaneous
division ratio is the sum of a base integer,
N,
,
and the
integer output of the SDM,
n,(t),
so the average
fractional division ratio
is
N
=
N,
+m2
(1)
where
a
is the average output of SDM, and
where
K
is the input integer to the SDM, and M is the
modulo used in the SDM.
When the PLL reaches the steady state, its output
frequency is,
and the frequency resolution would be
1
M
Af
=

f
,e,
(4)
The SDM used in a synthesizer is to randomize the
instantaneous division ratio and hence push phase noise
associated with the divider from low frequencies to
high frequencies. The loop filter filters out the phase
noise in high frequencies.
Openloop approximation is used to map the SDM