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project1 - ECE264D Project1: Design a 3rd order DSM with...

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s Design a 3 rd order delta-sigma modulator for a fractional-N PLL. s This DSM will be designed with Matlab script/program; s The input to the DSM is a fractional number with a minimum range of [0, 1], represented by a 24b digital word (0 b 0x000h, 1 b 0xFFFh) ; s The output is a digital word with 1b to 3b (this is a design parameter decided by you); s You can choose any 3 rd order DSM topology: single stage, Candy loop, MASH 111, MASH 2-1, with additional dithering, etc. . (reference: Shu, “A Comparative Study of DSM in Frac-N PLL) s Requirements: s 3 rd order noise shaping; table input range is at least [0,1]; ECE264D Project1: Design a 3 rd order DSM with Matlab® Page 1 s Stable input range is at least [0,1]; s signal bandwidth 0-0.05 fref; s Internal max word-length: max 27b or signed 26b; s All DSM internal values must be integer, within the max word-length, no overflow; s DSM coefficients: feed-forward coefficients have to be combination of 2^-n (bit shift only); s Simulate at least 2^16 data samples (clock cycles) when run simulations; ECE264D RF Frequency Synthesizers © 2009 G. Zhang
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This note was uploaded on 04/02/2011 for the course ECE 264 taught by Professor Song during the Spring '11 term at UCSB.

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project1 - ECE264D Project1: Design a 3rd order DSM with...

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