W11 HW6 updated

W11 HW6 updated - the threshold voltage for both PMOS and...

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ECE103 (W11) HW #6 Due date 3/10/11 1. A. Consider a Si p-substrate PMOS capacitor (NMOSFET) with N A =10 17 cm -3 , x 0 =10nm, and a metal gate. B. Consider a Si n-substrate NMOS capacitor (PMOSFET) with N D =10 17 cm -3 , x 0 =10nm, and a metal gate. a. For the PMOS, calculate the applied voltage and the electric field (at the Si-SiO 2 interface) to make the silicon surface intrinsic. What is the depletion width in this case? b. With no oxide fixed or mobile charges and no interface traps, calculate
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Unformatted text preview: the threshold voltage for both PMOS and NMOS. c. Sketch the Capacitance-Voltage characteristics for both devices by giving appropriate labeling to the voltage and capacitance axis. You may assume high f measurements. 2. Pierret, Problem 16.7 3. Pierret, Problem 16.9 4. Pierret, Problem 16.13 5. Pierret, Problem 17.2 (a-e) (need not to turn in) 6. Pierret, Problem 17.9 (need not to turn in)...
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