02ECE108HWset2_2010

02ECE108HWset2_2010 - ESENER ECE108 HW SET 2 SPRING 2010...

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ESENER ECE108 HW SET 2 SPRING 2010 Problem 1. An NMOS NOR gate with resistive load uses MOSFETs each with a threshold voltage ± =0.8 ² . ³ ´µ =5 . a) With only one input high · 1 =5 , it is desired to obtain an output voltage ¸ ¹ =0.4 º at a current flow from » ¼½ the power supply of ¾ ¿À =4 Á . Determine Ã Ä and Å Æ . b) Using a substrate doping Ç È =1 10 15 ÉÊ 3 ,=650 ËÌÍ∙ÎÏÐ , Ñ ÒÓ =0.2 ÔÕ determine Ö ×Ø , the oxide capacitance per unit area and W, the channel width, to yield the desired current. c) What will the output voltage be if all inputs are high? b) Problem 2. An NMOS depletion load inverter uses the same NMOS transistor as in 1). The load device has a threshold voltage Ù ÚÛ = 2.5 Ü . Ý Þß =5 à . To achieve the same output voltage ( á â =0.4 ã ) for ( ä åæ =5 ç as in 1), calculate the required è é for the pull-up transistor.
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Problem 3 . NMOS enhancement and depletion mode technologies are being compared to implement the
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This note was uploaded on 04/03/2011 for the course ECE 108 taught by Professor Kennethy.yun during the Spring '08 term at UCSD.

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02ECE108HWset2_2010 - ESENER ECE108 HW SET 2 SPRING 2010...

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