F06HW6interconnect with solutions

# F06HW6interconnect with solutions - NOR implementation than...

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Problem 1: An Aluminum wire on silicon has the following parameters r=0.075ohms/um and c=110aF/um. Given that the propagation delay of an RC limited line is 0.38RC calculate the propagation delay for a 10cm line Solution :31.4ns Assuming that a CMOS buffer can have a propagation delay of 0.1ns design a method to reduce the propagation delay of this line to 3.5ns t p = 0.38 rc (L/M) 2 M+(M-1)t pbuf M=18 would provide 3.5ns HW6 on interconnects ECE108 Esener

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tp = 0.73 ns Problem 2: A 0.25 um CMOS process with VDD= 3V results in a reference CMOS inverter with input capacitance Cin= 2.5 fF and propagation delay of tp0 = 30 ps A capacitive load of 20pF is to be driven. Find a design that will minimize the propagation delay Solution ( 29 min 1 2 ... 1 A u u u A N driver - + + + + = ( 29 2 1 2 ... 1 DD i N driver V C u u u E - + + + + = Given the area of the reference inverter is 1um2 Estimate the area taken by your buffer Estimate the energy dissipated by your inverter X = CL/Cin = 8000; uopt = e; N = 9 =4700um2 =100pJ
Probem 3: Design a PLA for the following functions using first a NOR

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Unformatted text preview: NOR implementation than a NAND NAND implementation F1 =AB+A’CD+C’D F2=A’B+AB F3=C(AB+DE) F4= D(CE+A’) How many rows and colums are needed If the unit cell area is 1um2 calculate the area of your PLA Problem 4: A CMOS inverter is used to drive a wire capacitance of CL=15fF. The sum of the gate and drain capacitances of the NMOS device is Cn=5fF . The transconductance parameter of the PMOS is 25uA/V2and for NMOS is 100A/V2. Using VDD = 3V, calculate the W/L ratios of the PMOS and NMOS transistors to minimize propagation delay. What is the propagation delay ? a = ( W/L) p /(W/L) n Problem 5: A pseudo NMOS inverter is used to drive a resistance of 1kOhm. The threshold voltage of the transistors are Vt=+/-0.25V. Using VDD = 3V, calculate the the transconductance parameter of the PMOS transistor to ensure a VOH of2.75V and transconductance parameter of the NMOS transistor to achieve VOL of 0.25V?...
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## This note was uploaded on 04/03/2011 for the course ECE 108 taught by Professor Kennethy.yun during the Spring '08 term at UCSD.

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F06HW6interconnect with solutions - NOR implementation than...

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