EE357Unit2a_Mult

# EE357Unit2a_Mult - Learning Objectives EE 357 Unit 2a...

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1 © Mark Redekopp, Al rights reserved EE 357 Unit 2a Multiplication Techniques © Mark Redekopp, Al rights reserved Learning Objectives • Perform by hand the different methods for unsigned and signed multiplication • Understand the various digital implementations of a multiplier along with their tradeoffs – Sequential add and shift method – Basic combinational array multiplier – Booth and/or Bit-Pair multiplier © Mark Redekopp, Al rights reserved MULTIPLICATION TECHNIQUES Add and Shift Method (Sequential) Booth’s Coding and Bit-Pair Recoding © Mark Redekopp, Al rights reserved Unsigned Multiplication Review Same rules as decimal multiplication Multiply each bit of Q by M shifting as you go An m-bit * n-bit mult. produces an m+n bit result (i.e. n-bit * n-bit produces 2*n bit result) Notice each partial product is a shifted copy of M or 0 (zero) 1010 * 1011 1010 1010_ 0000__ + 1010___ 01101110 M (Multiplicand) Q (Multiplier) PP(Partial Products) P (Product)

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2 © Mark Redekopp, Al rights reserved Multiplication Techniques • A multiplier unit can be – Purely Combinational: Each partial product is produced in parallel and fed into an array of adders to generate the product – Sequential and Combinational: Produce and add 1 partial product at a time (per cycle) © Mark Redekopp, Al rights reserved Combinational Multiplier • Partial Product (PP i ) Generation – Multiply Q[i] * M • if Q[i]=0 => PP i = 0 • if Q[i]=1 => PP i = M – AND gates can be used to generate each partial product M [ 3 ] M [ 2 ] M [ 1 ] M [ 0 ] M [ 3 ] M [ 2 ] M [ 1 ] M [ 0 ] Q [ i ]=0 if… Q [ i ]=1 if… 0 0 0 0 1 1 1 1 0 0 0 0 M [ 3 ] M [ 2 ] M [ 1 ] M [ 0 ] © Mark Redekopp, Al rights reserved Combinational Multiplier • Partial Products must be added together • Combinational multipliers suffer from long propagation delay through the adders – propagation delay is proportional to the number of partial products (i.e. number of bits of input) and the width of each adder © Mark Redekopp, Al rights reserved Adder Propagation Delay X Y S Ci Co X Y S Ci Co FA FA X Y S Ci Co X Y S Ci Co FA FA 0 1111 + 0001 0 0 0
3 © Mark Redekopp, Al rights reserved X Y S Ci Co X Y S Ci Co FA FA X Y S Ci Co X Y S Ci Co FA FA 0 1111 + 0001 0 0 0 1 1 1 1 1 0 0 0 Adder Propagation Delay © Mark Redekopp, Al rights reserved X Y S Ci Co X Y S Ci Co FA FA X Y S Ci Co X Y S Ci Co FA FA 1 1 1 1 1 0 0 0 0 0 1 1 1 1 0 0 0 1111 + 0001 Adder Propagation Delay © Mark Redekopp, Al rights reserved X Y S Ci Co X Y S Ci Co FA FA X Y S Ci Co X Y S Ci Co FA FA 1 1 1 1 1 0 0 0 0 0 1 0 1 1 1 1111 + 0001 0 0 Adder Propagation Delay © Mark Redekopp, Al rights reserved X Y S Ci Co X Y S Ci Co FA FA X Y S Ci Co X Y S Ci Co FA FA 1 1 1 1 1 0 0 0 0 0 1 0 1 1 1111 + 0001 0 1 0 Adder Propagation Delay

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4 © Mark Redekopp, Al rights reserved X Y S Ci Co X Y S Ci Co FA FA X Y S Ci Co X Y S Ci Co FA FA 1 1 1 1 1 0 0 0 0 0 1 0 1 1111 + 0001 0 1 0 1 Adder Propagation Delay © Mark Redekopp, Al rights reserved
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## This note was uploaded on 04/03/2011 for the course EE 357 taught by Professor Mayeda during the Spring '08 term at USC.

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EE357Unit2a_Mult - Learning Objectives EE 357 Unit 2a...

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