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ee457_MT_fl07

ee457_MT_fl07 - ee457_MT_fl07.fm Fall 2007 EE457 Midterm...

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ee457_MT_fl07.fm 11/2/07 EE457 Midterm Exam for future practice - Fall 2007 Page - 1 / 13 C Copyright 2007 Gandhi Puvvada Fall 2007 EE457 Instructor: Gandhi Puvvada Midterm Exam (20%) Date: 11/2/2007, Friday Time: 4:00 - 6:25PM SGM123/124 Name: Total points: 224.5 Perfect score: 200 / 224.5 1 ( 10 + 10 + 10 = 30 points) 20 min. Simple data path and control (difficult question, do it at the end): Shown below is a small part of a larger 28-state design. The single bit registers A, B are changed only in the three states shown below. Part of the datapath associated with the single bit registers A, B is also shown on the next page. The three 2-to-1 muxes upstream of each flip-flop help you to route the four different values to the input of the FF. Four different values or three different values? Well, do not forget to recirculating the current value back to itself in the rest of the states! A. Please complete datapath connections to the input of the muxes on the next page B. Please complete the needed logic (output function logic) to drive the 6 select lines Assume one-hot state assignment for the states C. Please complete the waveforms for A and B for Ain = 1 and Bin = 0 D. Please complete the waveforms for A and B for Ain = 0 and Bin = 1 10 pts 10 pts if A = 1, then flip A (i.e. A <= A ); B <= A; QS12 A <= B; B <= A ; QS28 A <= Ain, B <= Bin; QS1 START START RESET ACK ACK 1 Ain = 1 Bin = 0 Ain = 0 Bin = 1
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