{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

EE477L_Problems_From_Old_Homeworks_022311

# EE477L_Problems_From_Old_Homeworks_022311 - Pt’oigiemg...

This preview shows pages 1–5. Sign up to view the full content.

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Pt’oigiemg gram (91A homeworkg Inverter Inverter Spring 2009 ‘3 8. (12 %) An inverter has the transistors sized so that as the input falls from Vdd to Gnd., a current spike occurs at Vin = .75v. What does that tell us about the ratio of betas of the two . r” transmtors? . g" < V W??? > ‘1' V.‘ ’1‘ V-P/ )6 Solution: ‘1' 1 an I . A . The spike occurs at region C, when both transistors are in saturation. If the ‘ ¢ 9‘ .’s are equal, this occurs at VDD/2. Here, region C is occuring to the left of t y this, so this tells us that the nmos transistor is stronger (it pulls the output down more quickly) sognerrl > lipeffl. > " > E? W» «Va ‘2 .L\ 9. (10%) Assume an inverter is on segment B of the input/output transfer curve. If Vin = 1.0 v, what is the minimum value of Vout to remain in the B segment? v V9? vm if N W I In region B, the pmos is in the linear region, and the nmos is in the saturation region. Therefore: Vdsp > Vgsp — thO Vout - VDD > Vin - VDD - tho Vout>1.0 + 0.7 = 1.7V And: Vdsn > Vgsn — thO Vout > Vin - tho Vout>1.0 - 0.7 = 0.3V The minimum voltage to satisfy both of these conditions is Vout = 1.7V . Solution: inverter Spring 2008 3 7. (10 %) An inverter has the transistors sized so that as the input falls from Vdd to Gnd., the "C_" 5/ point where both transistors are in saturation occurs at Vin = 0.95v. What does that tell us about the betas of the two transistors? —-'"—"‘ d 99 Solution: V L (U a ' a; 7. “i " . “C” point occurred at Vin = 0.95V < Vdd’Z (=1.25V) implies that the transfer curve ' shifts to the left which means Iﬂ |> lor |—" |< 1. ﬂy ﬁn ent B of the inpu't/ou ut transfer curve. If Vin is known, l‘\ 8. (10%) Assume an inverter is on so would you compute Vom? Outline and the widths/lengths of the two trans tors are known, h Solution: VI up the current equations 1‘01 both Idsptlin): {Bit/3* (V351, ‘ VT) Vdsp V6592 ] Idsn{sat}= (Bu/2) (V3511 ‘ Vin) ] Idspﬂin) = -L1 (5.1;) ") Solve for Vdsp ') V0“; = Vdd + Vdsp region) we can 3 Channel resistance: 5) 8. (10%) Compute the channel resistance of an NMOS transistor when Vgs = 1.7 v and Vds = .9 V. Vs=0.0 V. V'lzhy': .CV en ~ “WW "7.. “v" (v7- ‘ VAL Jo—n' I' hurt, w/“L [a Re 5‘: V95 VDS ? V35 “V6 oqv <I-7V—0.G\/ 1:52: R4144- C: LAG .___.___..-——- ﬁfty-4037,,L-1 a I éC‘fgs—LQDW'; (40/152th _ . ”wk“: I": WC “9"” 195’ :4 (lav-Vt" Halfhbbe. .' .J—~ ,5” & H g: F 2 H3 Qt é(/.I-— 02%) l i h +Crm WL: — '“——‘——-- I 5 0'1: J 194:4: 510.00Lf'lk '\ .. _- 9:! 2r _____._ Spring 2008 6. (10%) Compute the channel resistance of a PMOS transistor when Vgs = -l .6 V and Vds = -0.8 v. Vs=2.5 V. 6. Vdsp = -0.8V, Vgsp : -1 .6V, VS = 2.5V (no body effectj) th = -0.6V IVgspl > MI (or Vgsp < V“. )9 PMOS is on. lVdspl < lVgspl — |V€Pl (or Vdsp > Vgsp — le) '9 PMOS is in linear region of operation. 60 [3,,“ ngI-l 39 I) 517(H‘A/I/2)-1(I/) Pass transistor: Spring 2009 1. a) (12 %) A PMOS transistor is used as a pass transistor. In an effort to improve the transmission of zeros, the gate voltage is changed to -.7v. What is the ﬁnal output voltage [email protected] Vera: .O‘V when Vin = 0.0V? Does the pass transistor transfer 0's better or worse than before? Try to be quantitative in your explanation. b) (5%) Does body effect occur when the transistor transfers 0's? Solution: a) The pmos is on when Vgsp < thbe (there is body effect since the source is not connected to Vdd). Then: —0.7 - Vout< -0.9 Vout > 0.2V So the pmos will be on until Vout: 0.2V , then it will not fall any further. If the gate voltage had been 0V , then Vout = 0.9V , so lowering the gate voltage passed a better zero. b) An nmos transistor can pass a zero without body effect, but a pmos cannot Fall 2007 4.(5 %) A PMOS transistor passes a weak 0. Does body effect make the O stronger or weaker? [ii WMKW Fo‘f {Kemp/ﬂ) if Vj=0VI Vaui” gig/Q75. “M VWOV HAM ti»L pm Xia‘l'w‘ («Mi 04+ J'F'F 4+— Vou'i‘: ‘Vt-Pur Coal/ Mala/X oi: ~Vteo=ao v. Additional Problems Fall 2007 1. a) (5 %) Identify the sources and drains in a transmission gate at t=0+ when Vin = 1.5 v. and VM 3 0.5 v. Vgn = 2.5V, and VgP = 0v. b) (10 %) What regions are the two transistors in when t approaches inﬁnity? Be sure to justify your answers. 3. (10 %) A PMOS transistor has VGS = -1.0 V , VDs = -0.9 V. Vs = 1.0 v. What region of operation is it in? Now assume V53 = -1.2 V and VDS = —.2 V. What region of operation is the transistor in? '7. (10%) Compute the drain current flow Ipsin a PMOS transistor when VDs= ~22 v, and V63 = -1.7 V. Assume the transistor width is 24 lambda and the length is 3 lambda. ...
View Full Document

{[ snackBarMessage ]}

### Page1 / 5

EE477L_Problems_From_Old_Homeworks_022311 - Pt’oigiemg...

This preview shows document pages 1 - 5. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online