ee457_ch4_p1

ee457_ch4_p1 - 4'5 ConstrucTins an A LU We mad a 1-bit ALU...

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Unformatted text preview: 4'5 ConstrucTins an A LU We mad a 1-bit ALU flint, ovd rm truiqu 31-5” ALL) “3 Cascading 31 010 1.1“ ALUs. Hut, wt flapport CmLa a, guts-1" USMC-GM ALU fiumfaifi, mom-Ll AND, 05:, ADD, 508. 5"“ Na. (1159 product Mam» (o‘t‘i and ofitfimw 9:33" Q3 0 Ruck a“ EU“ b a b” AND [OR :D 3 FULL ADDER x ~/oR GATE FIGURE 4.6 FIGURE 4.1 A 1-bit ALL! that rf AND. R. d dd'ti - pe arms 0 an a I a" A 32-bit ALu constructed from 32 l-bii ALUs. CalryOuI Carr on? FIGURE 4.13 A 1-bit ALU that performs AND, OR, and addition on a and h or a and El . By selecting b (Binvert = I} and setting Carryln to 1, we get two’s complement subtracuon of b from 3 instead of addinon of b to a. FIGURE 4.14 A 1-bit ALU that performs AND, OR, and addition on a and h or E . It includes a direct input that is cormected to pertorm the set~on-less-than operation (see Figure 4.16}. - Sass? Ovulllow ovE R F Low Oul' FIGURE 4.15 A 1-bit ALU ‘lor the most significant bit. it includes a difct output from the adder for the 195:: lhan comparison called bet. M S B B o c k Overflow detection (1,6‘l'6 ReSUIIO Resmt31 Set -—r meme“- 3”! FIGURE 4.16 A 32-bit AlU constructed from the 31 1-bit ALUs lound in Figure 4.14 and one 1-bit ALU found in Figure 4.15. The Less Inputs are connected to 0 except for the least 31g- nificant bit, and that [5 connected to the Sc! output of the most significant bit. If the ALU pertorm.» a — b and we select the Input 3 in the multiplexer in figures 4.14 and 4.15, then Result =0, 00] it a < b and 0, and 000 Otherwme. q -7 q -7 194 Chapter 4 Alithmetic for Computers C I _ m OPERA'HON ResunO CanyOut ALUl Less CarryOut ' ' Zero Canwn ALU2 Less CarryOut “I. Resunal Se: ———‘—-—'——* Overhuw FIGURE 4.17 The final 32-bit ALU. This adds a Zen) delector to Figfire 4.16, using the 1-bit ALL'. M 4-8 4.5 Constructing an Arithmetic Logic Unit 195 Zero ReSuH Overflow Carryout FIGURE 4.18 The symbol commonly used to represent an ALU, as shown in Figure 4.17. This symbol is also u5ed to represent an adder, so it is “Ol'muiiy labeled either with ALU or Adria: The control lines labeled ALUOperation include the Operation and linegate lines from Figure 4.17; their values and the ALU operation are found in Figure 4.19. Strptrqu‘. Seven-less, lllal'. FIGURE 4.15 The we ma 6 hreo ALU Control lines Bnegate and Operation and the corresponding ALU operations. g _ q (I " q £93m bot: £2457_oju.LLt1 £440 Q-lo (+41 (4-1 ...
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ee457_ch4_p1 - 4'5 ConstrucTins an A LU We mad a 1-bit ALU...

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