Unformatted text preview: Lecture 17: Frequency Response Design • Overview • Phase Lag Compensation Design • Phase Lead Compensation Design • Reading: Chapter 8.4 Design via. Frequency Response
R(s)
+ T
D(z ) G(s) C (s) ¡ G(z) = Z [G(s)] (transformed to the wplane) ¯ G(w) = G(z)¯z= 1+(T =2)w 1¡(T =2)w D(z ) Frequency response of the uncompensated system: ¯ G(j !w ) = G(w)¯w=j ! , 0 < !w < 1
w ¯ D(w) = D(z)¯z= 1+(T =2)w 1¡(T =2)w Frequency response of the digital compensator D(z):
w Frequency response of the compensated system: ¯ ¯ D(j !w )G(j !w ) = D(w)¯ G(w)¯
w=j !w ¯ D(j !w ) = D(w)¯w=j ! , 0 < !w < 1
w=j !w , 0 < !w < 1 1 Remarks
• For many practical systems, G(z) is unknown. Rather, its frequency response G(j!w) is obtained via experimental measurement
Many of the closedloop system characteristics, hence design objectives, can be determined from its (openloop) frequency response G(j!w) If G(j!w) of the uncompensated system is not satisfactory, one can design a digital controller D(w) to modify it to meet the design specifications: • • 20 log[D(j !w )G(j !w )] = 20 log D(j !w ) + 20 log G(j !w )
6 [D(j !w )G(j !w)] = 6 D(j !w ) + 6 G(j !w )
D(z) = D(w)¯w= 2 • Once D(w) has been designed, one can transform it back to the zplane ¯
z¡1 T z+1 to obtain the desired digital compensator What Can Be Read from G(j!w)?
20 log jG(j !w )j 0 dB Gm 6 G(j !w ) ¡180± Ám • Stability margin (for a stabile system, magnitude plot needs to cross 0dB line at a smaller frequency than phase angle plot crossing 180 degree) – Gain margin Gm and phase margin ©m Steadystate error constant Kdc from low frequency part Bandwidth from high frequency part of the closed loop frequency response:
G(j !w ) 1+G(j !w ) • • 2 Converting D(z) to D(w)
z¡z0 D(z ) = Kd z¡zp (a first order digital compensator) z= 1+(T =2)w 1¡(T =2)w transformed to the wplane 1+w=!w0 D(w) = a0 1+w=!wp where
w0 Kd = a0 !wp(!wp+2=T ) w0 ! (! +2=T ) z0 =
zp = 1¡(T =2)!w0 1+(T =2)!w0
1¡(T =2)!wp 1+(T =2)!wp Check that the DC gains agree: D(z)jz=1 = D(w)w=0 = a0 Phase Lag Compensator
z¡z0 D(z ) = Kd z¡zp z0 < zp < 1 ) D(w) = 1+w=!w0 a0 1+w=!wp , !w0 > !wp > 0
20 log jG(j !w )j Low freq. gain: 20 log a0 dB High freq. gain: 20 log a0 !wp !w0 dB
6 G(j !w ) 0±
Max phase lag: ½m
!wp !wm !w0 phase lag 3 Frequency Response with PhaseLag Compensation
20 log jG(j !w )j 0 dB 6 G(j !w ) ¡180± !wp !wm !w0 G(j !w ) (uncompensated system)
D(j !w )G(j !w) (compensated system) Remarks on PhaseLag Compensator
• Essentially a low pass filter
– Increase the low frequency gain, hence the DC gain Kdc, by a factor of a0 , improving steadystate error performance a! – Increase (or even decrease) the high frequency gain by a smaller factor 0 wp !w0 thus reducing sensitivity with respect to high frequency noises. – Sideeffect: may reduce bandwidth, leading to slower response – Properly designed, may even reduce the 0dB crossover frequency of G(j!w), thus improving stability margin • On the other hand, may introduces some phase lag around the frequency !wm, which may decrease stability margin if !wm is in the vicinity of 180 degree crossover of ÅG(j!w) 4 Idea of PhaseLag Compensation Design
1+w=!w0 D(w) = a0 1+w=!wp , !w0 > !wp > 0 • • Design objectives: increase Kdc and phase margin simultaneously First, determine a0 so that the DC gain of the compensated system satisfies design specifications Determine !w0 and !wp so that the 0dB crossover frequency of G(j!w) is shifted left to a frequency !1 with enough phase margin Ensure that the max phase lag introduced by D(w) occurs at a frequency !m away from the 180 degree crossover of ÅG(j!w) • • Example
R(s)
+ T = 0:05
D(z ) G(s) C (s) ¡ Gp (s) = 1 s(s+1)(0:5s+1) G(s) = 1¡e¡sT s Gp (s) Kdc = limz!1 (z ¡ 1)G(z) = 0:05 ¯ G(w) = G(z)¯z= 1+(T =2)w = 1¡(T =2)w G(z) = Z [G(s)] = 0:001(0:23136z+0:000928) (z¡1)(z¡0:9512)(z¡0:9048) 0:0002304w3 ¡0:009143w2 ¡0:37463w+14:8664 7:4333w3 +22:2967w2 +14:8664w ess = T Kdc =1 5 Uncompensated Frequency Response
Bode Diagram 60 40 20 Magnitude (dB) System: sys Frequency (rad/sec): 0.75 Magnitude (dB): 0.0148 0 20 40 60 270 225 System: sys Frequency (rad/sec): 0.75 Phase (deg): 212 Phase (deg) 180 135 90 10
3 10 2 10 1 10 0 10 1 Frequency (rad/sec) Phase margin of the uncompensated system: Ám = 212± ¡ 180± = 32± Gain margin of the compensated system:
Gm = 8:89 dB Design Problem
Objective: reduce ess by half, and increase phase margin Ám to Á¤ = 55± m First, choose a0 = 2 Next, find !1 for the desired 0 dB crossover frequency with enough phase margin:
6
60 40 G(j !w ) = §180 + Á¤ + 5± m
Bode Diagram Magnitude (dB) 20 0 20 40 60 270 225 Phase (deg) 60± 180 135 90 10
3 10 2 10 1 10 0 10 1 Frequency (rad/sec) !1 = 0:36 6 Determining !w0
Then, choose !w0 small enough so that the phase lag introduced by D(w) is negligible at !1 : !w0 = 0:1!1 Bode Diagram 60 40 Magnitude (dB) 20 0 20 40 60 270 225 Phase (deg) 60± 180 135 90 10
3 10 2 10 1 10 0 10 1 Frequency (rad/sec) !w0 = 0:036 !1 = 0:36 Determining !wp
Then, find !wp so that the compensated gain crosses 0 dB at about frequency !1: ! jD(j !1 )G(j !1)j ' a0 !wp jG(j !1 )j = 1 w0
)
60 40 !wp = !w0 a0 jG(j !1 )j = 0:036 2£2:57 = 0:007 Bode Diagram Magnitude (dB) 20 0 20 40 60 270 225 Phase (deg) 60± 180 135 90 10
3 10 2 10 1 10 0 10 1 Frequency (rad/sec) !wp = 0:007 !w0 = 0:036 !1 = 0:36 7 Assembling for D(w) and D(z)
1+w=!w0 D(w) = a0 1+w=!wp = 2 1+w=0:036 1+w=0:007
z¡z0 D(z ) = Kd z¡zp where
w0 Kd = a0 !wp(!wp+2=T ) = 0:38917 w0 ! (! +2=T ) z0 =
zp = 1¡(T =2)!w0 1+(T =2)!w0
1¡(T =2)!wp 1+(T =2)!wp = 0:9982
= 0:9996 D(z ) = 0:38917 z¡0:9982 z ¡0:9996 Compensated Frequency Response
Bode Diagram 100 50
Magnitude (dB) System: sys Frequency (rad/sec): 0.362 Magnitude (dB): 0.00154 0 50 100 270 System: sys Frequency (rad/sec): 0.362 Phase (deg): 235 225
Phase (deg) 180 135 90 10
3 10 2 10 1 10 0 10 1 Frequency (rad/sec) Phase margin of the compensated system: Gain margin of the compensated system: Ám = 235± ¡ 180± = 55± Gm = 16:7 dB 8 Step Responses
Step Response 1.5 uncompensated compensated
1 Amplitude 0.5 0 0 100 200 300 400 500 Samples 600 700 800 900 1000 Summary of PhaseLag Compensator
• Advantages:
– Lowfrequency characteristics can be improved – Stability margin may be improved – Bandwidth reduced, less sensitive to highfrequency noise • Disadvantages:
– Reduced bandwidth means slower response – Numerical problems with filter coefficients may result – Response has a long (though small) tail due to the extra closedloop pole near 1 introduced by the compensator 9 Phase Lead Compensator
)
1+w=!w0 D(w) = a0 1+w=!wp
z¡z0 D(z ) = Kd z¡zp zp < z0 < 1 0 < !w0 < !wp
20 log jG(j !w )j High freq. gain: 20 log a0 !wp !w0 dB Low freq. (DC) gain: 20 log a0 dB
6 G(j !w )
phase lead Max phase lead: µm 0± !w0 !wm !wp Maximum Phase Lead
µm = max 6 D(j !w ) = max 6
1+j !w =!w0 1+j !w =!wp It can be verified that the maximum is achieved at the frequency !wm that is the geometric average of !w0 and !wp: h = max tan¡1 !w !w0 ¡ tan¡1 !w !wp i !wm = p !w0 !wp And the maximum phase lead generated by the compensator D(w) is: ·q ¸ q !wp !w0 µm = tan¡1 1 ¡ !wp 2 !w0
µm 1 q !w p !w 0 10 Frequency Response with PhaseLead Compensation
20 log jG(j !w )j 0 dB 6 G(j !w ) ¡180± !w0 !wm !wp G(j !w ) (uncompensated system)
D(j !w )G(j !w) (compensated system) Remarks on PhaseLag Compensator
• Essentially a high pass filter: increasing high frequency gain relative to low frequency gain. Normally, the maximum phase lead is introduced in the vicinity of 180 degree crossover of ÅG(j!w), thus increasing stability margin However, phase lead compensator will introduce destabilizing factor, namely, increasing higher frequency gain relative to low frequency gain System bandwidth is increased. Hence faster response but more prone to high frequency noises • • • 11 Idea of PhaseLead Compensation Design
1+w=!w0 D(w) = a0 1+w=!wp , 0 < !w0 < !wp • Design objectives: achieve the desired phase margin Ám* and a satisfactory steadystate error performance First, determine the DC gain a0 to satisfy the steadystate error specification Then determine !w0 and !wp so that the 0 dB crossover frequency of G(j!w) is shifted right to a point !1 with exactly Ám* as phase margin
D(j !1)G(j !1) = 16 (180± + Á¤ ) m • • • While doing above, ensure that the higher gain at high frequency introduced by D(w) does not destabilize the system Example
R(s)
+ T = 0:05
D(z ) G(s) C (s) ¡ Gp (s) = 1 s(s+1)(0:5s+1) G(s) = 1¡e¡sT s Gp (s) G(z) = Z [G(s)] = ¯ G(w) = G(z)¯z= 1+(T =2)w 0:001(0:23136z+0:000928) (z¡1)(z¡0:9512)(z¡0:9048) 1¡(T =2)w = 0:0002304w3 ¡0:009143w2 ¡0:37463w+14:8664 7:4333w3 +22:2967w2 +14:8664w Kdc = limz!1 (z ¡ 1)G(z) = 0:05 ess = T Kdc =1 12 Uncompensated Frequency Response
Bode Diagram 50 System: sys Frequency (rad/sec): 0.748 Magnitude (dB): 0.00103
Magnitude (dB) 0 50 100 270 System: sys Frequency (rad/sec): 0.74 Phase (deg): 212 Phase (deg) 180 90 0 10
2 10 1 10 0 10 1 10 2 Phase margin of the uncompensated system: Ám = 212± ¡ 180± = 32± Gain margin of the compensated system:
Gm = 8:89 dB Frequency (rad/sec) Design Problem
Objective: increase phase margin Ám to Á¤ = 55± without changing ess m First, choose a0 = 1
Bode Diagram 50 Magnitude (dB) Phase (deg) 0 50 100 270 180 90 0 10
2 10 1 10 0 10 1 10 2 Frequency (rad/sec) 13 Finding !1
Next, find a suitable !1 as the new 0 dB crossover frequency: D(j !1)G(j !1) = 16 (180± + Á¤ ) ) m
6 jD(j !1)j = 1=jG(j !1)j D(j !1 ) = 180± + Á¤ ¡ 6 G(j !1) m
) ) !1 ¸ 0:42 rad/s !1 ¸ 0:745 rad/s Constraint 1: 6 G(j !1) < 180± + Á¤ m
jG(j !1 )j <
1 a0
Bode Diagram Constraint 2:
50 System: sys Frequency (rad/sec): 0.745 Magnitude (dB): 0.0455 Magnitude (dB) 0 50 100 270 System: sys Frequency (rad/sec): 0.42 Phase (deg): 235 Phase (deg) 180 90 0 10
2 10 1 10 0 10 1 10 2 Frequency (rad/sec) !1 = 1:2 Determining !w0 and !wp
w0 After !1 is determined, in order for D(w) = a0 1+w=!wp to satisfy 1+w=! jD(j !1)j = 1=jG(j !1)j
6 D(j !1 ) = 180± + Á¤ ¡ 6 G(j !1) := µ m we must have !w0 = a0 !1 jG(j !1 )j sin µ 1¡a0 jG(j !1 )j cos µ )
) !w0 = 0:5879
!wp = 4:187 !wp =
• !1 sin µ cos µ¡a0 jG(j !1 )j If for the determined !1, the computed !wp<0, then one needs to go back and increase !1 further to ensure that the compensator D(w) is stable Constraint 3: cos µ ¡ a0jG(j !1)j > 0 14 Assembling for D(w) and D(z)
1+w=!w0 D(w) = a0 1+w=!wp =
z¡z0 D(z ) = Kd z¡zp 1+w=0:5879 1+w=4:187 where
w0 Kd = a0 !wp(!wp+2=T ) = 6:539 w0 ! (! +2=T ) z0 =
zp = 1¡(T =2)!w0 1+(T =2)!w0
1¡(T =2)!wp 1+(T =2)!wp = 0:9710
= 0:8106 D(z ) = 6:539 z¡0:9710 z¡0:8106 Compensated Frequency Response
Bode Diagram 50 System: sys Frequency (rad/sec): 1.2 Magnitude (dB): 0.00203 0
Magnitude (dB) System: sys Frequency (rad/sec): 3.05 Magnitude (dB): 12.4 50 100 270 System: sys Frequency (rad/sec): 1.2 Phase (deg): 235 System: sys Frequency (rad/sec): 3.05 Phase (deg): 180 180
Phase (deg) 90 0 10
2 10 1 10 0 10 1 10 2 Frequency (rad/sec) Phase margin of the compensated system: Gain margin of the compensated system: Ám = 235 ¡ 180 = 55 (need to verify this!) Gm = 12:4 dB ± ± ± 15 Step Responses
Step Response 1.5 uncompensated lag compensation
1
Amplitude lead compensation
0.5 0 0 100 200 300 400 500 600 700 Time (sec) Summary of PhaseLead Compensator
• Advantages:
– Stability margin is improved – Response speed is generally faster • Disadvantages:
– High frequency noise is accentuated – In physical realization, the compensator may generate output signal with very large amplitude, possibly outside the linearity zone of the plant 16 ...
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This note was uploaded on 04/15/2011 for the course ECE 483 taught by Professor Evens during the Spring '08 term at Purdue.
 Spring '08
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