115C_1_03b_ee_115c_cmos_logic

115C_1_03b_ee_115c_cmos_logic - EE115C Digital Electronic...

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EE115C Digital Electronic Circuits Lecture 3b: Static CMOS Logic
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EE115C 2 Positive and Negative Logic Switches V A A V A A Switch ON when A = 1 Switch ON when A = 0
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3 Example: NAND Gate Out = 1 or “Pull - Up” At least one path exists from V DD to Out Out = 0 or “Pull - Down” At least one path exists from ground to Out EE115C
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4 Example: NOR Gate Out = 1 or “Pull - Up” At least one path exists from V DD to Out Out = 0 or “Pull - Down” At least one path exists from ground to Out EE115C
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5 General Static CMOS Logic Gate V DD F(In 1 ,In 2 ,…In N ) In 1 In 2 In N In 1 In 2 In N PUP PDN PMOS only NMOS only For cases when F(In 1 ,…In N ) = 1 “Pull - Down” network (PDN) has at least one path from Out to ground “Pull - Up” network (PUP) has no paths from V DD to ground For cases when F(In 1 ,…In N ) = 0 i.e. when F(In 1 ,…In N ) = 1 PUP has a path (from V DD ) but PDN has no path (from ground)
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This note was uploaded on 04/16/2011 for the course EE 115C taught by Professor N/a during the Spring '10 term at UCLA.

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115C_1_03b_ee_115c_cmos_logic - EE115C Digital Electronic...

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