115C_1_10a_ee115c_ptl

# 115C_1_10a_ee115c_ptl - A = 2.5 V C = 2.5 V Solution 3...

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EE115C Digital Electronic Circuits Lecture 10a: Pass Transistor Logic

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EE115C 2 Example: AND Gate B B A F = AB 0 A B F 0 0 0 0 1 0 1 0 0 1 1 1
3 General Pass Transistor Logic (PTL) Switch Network Out Out A B B B Inputs Allows primary inputs to drive S and D terminals ! EE115C

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4 A = 2.5 V B C = 2.5 V C L A = 2.5 V C = 2.5 V B M 2 M 1 M n PTL Problem #1 : Improper Switch V B does not pull up to 2.5V , but to 2.5V – V Tn EE115C
5 PTL Problem #1 : Improper Switch (…contd.) 0 0.5 1 1.5 2 0.0 1.0 2.0 3.0 Time [ns] x Out In Voltage [V] V DD In Out x 0.5 m/0.25 m 0.5 m/0.25 m 1.5 m/0.25 m EE115C

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6 M 2 M 1 M n M r Out A B V DD V DD Level Restorer X Advantage: Full swing Restorer adds capacitance, takes away PDN current at X Ratio problem Solution 1: Level Restoring Transistor EE115C
7 Restorer Sizing 0 100 200 300 400 500 0.0 1.0 2.0 W / L r =1.0/0.25 W / L r =1.25/0.25 W / L r =1.50/0.25 W / L r =1.75/0.25 Time [ps] 3.0 Voltage at node x [V] Upper limit on restorer size Pass-transistor PDN can have several transistors in stack W/L n = 0.5 μ m / 0.25 μ m EE115C

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8 Out V DD V DD 2.5V V DD 0V 2.5V 0V Watch out for leakage currents Solution 2: Zero V T Transistors A A Zero V T transistors EE115C
9 A B C C A B C C B C L C = 0 V

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Unformatted text preview: A = 2.5 V C = 2.5 V Solution 3: Transmission Gate • Bidirectional switch • Rail-to-rail switching • Requires two transistors • More control signals needed EE115C 10 V out 0 V 2.5 V 2.5 V R n R p 0.0 1.0 2.0 0 10 20 30 V out , V Resistance, ohms R n R p R n || R p Resistance of Transmission Gate off sat sat lin V out : 0 1 EE115C 11 Pass Transistor based Multiplexer A M 2 M 1 B S S S F V DD F A S B S EE115C 12 A F A B B M1 M2 M3/M4 Transmission Gate XOR • 6 transistors only • 12 transistors in CMOS “on” for B = 1 “on” for B = 0 B B EE115C 13 V 1 V i-1 C 2.5 2.5 V i V i+1 C C 2.5 V n-1 V n C C 2.5 In V 1 V i V i+1 C V n-1 V n C C In R eq R eq R eq R eq C C (a) (b) C R eq R eq C C R eq C C R eq R eq C C R eq C In m (c) PTL Problems #2 : Delay Too much delay if many gates are used in series ! EE115C...
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## This note was uploaded on 04/16/2011 for the course EE 115C taught by Professor N/a during the Spring '10 term at UCLA.

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115C_1_10a_ee115c_ptl - A = 2.5 V C = 2.5 V Solution 3...

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