CH8_modified - Central Processing Unit CENTRAL PROCESSING...

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1 Central Processing Unit CENTRAL PROCESSING UNIT Introduction General Register Organization Stack Organization Instruction Formats Addressing Modes Data Transfer and Manipulation Program Control
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2 Central Processing Unit MAJOR COMPONENTS OF CPU Introduction Storage Components Registers Flags Execution (Processing) Components Arithmetic Logic Unit (ALU) Arithmetic calculations, Logical computations, Shifts/Rotates Transfer Components Bus Control Components Control Unit Register Set ALU Control Unit
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3 Central Processing Unit GENERAL REGISTER ORGANIZATION General Register Organization MUX SELA { MUX } SELB ALU OPR R1 R2 R3 R4 R5 R6 R7 Input 3 x 8 decoder SELD Load (7 lines) Output A bus B bus Clock Example: R1 R2 + R3 [1] MUX A selector (SELA): BUS A R2 [2] MUX B selector (SELB): BUS B R3 [3] ALU operation selector (OPR): ADD [4] Decoder destination selector (SELD): R1 Output Bus
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4 Central Processing Unit CONTROL WORD General Register Organization Control Word SELA SELB SELD OPR 3 3 3 5 MUX SELA { MUX } SELB ALU OPR R1 R2 R3 R4 R5 R6 R7 Input 3 x 8 decoder SELD Load (7 lines) Output A bus B bus Clock
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5 Central Processing Unit CONTROL WORD Control Encoding of register selection fields Binary Code SELA SELB SELD 000 Input Input None 001 R1 R1 R1 010 R2 R2 R2 011 R3 R3 R3 100 R4 R4 R4 101 R5 R5 R5 110 R6 R6 R6 111 R7 R7 R7 Control Word SELA SELB SELD OPR 3 3 3 5 Encoding of ALU operations OPR Select Operation Symbol 00000 Transfer A TSFA 00001 Increment A INCA 00010 ADD A + B ADD 00101 Subtract A - B SUB 00110 Decrement A DECA 01000 AND A and B AND 01010 OR A and B OR 01100 XOR A and B XOR 01110 Complement A COMA 10000 Shift right A SHRA 11000 Shift left A SHLA
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6 Central Processing Unit EXAMPLES OF MICROOPERATIONS Control Symbolic Designation Microoperation SELA SELB SELD OPR Control Word R1 R2 - R3 R2 R3 R1 SUB 010 011 001 00101 R4 R4 R5 R4 R5 R4 OR 100 101 100 01010 R6 R6 + 1 R6 - R6 INCA 110 000 110 00001 R7 R1 R1 - R7 TSFA 001 000 111 00000 Output R2 R2 - None TSFA 010 000 000 00000 Output Input Input - None TSFA 000 000 000 00000 R4 shl R4 R4 - R4 SHLA 100 000 100 11000 R5 0 R5 R5 R5 XOR 101 101 101 01100
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7 Central Processing Unit REGISTER STACK ORGANIZATION Push, Pop operations /* Initially, SP = 0, EMPTY = 1, FULL = 0 */ Stack Organization PUSH SP SP + 1 M[SP] DR If (SP = 0) then (FULL 1) EMPTY 0 Stack - Very useful feature for nested subroutines, nested loops control
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CH8_modified - Central Processing Unit CENTRAL PROCESSING...

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