CH12 - Memory Organization MEMORY ORGANIZATION Memory...

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1 Memory Organization Memory Hierarchy Main Memory MEMORY ORGANIZATION
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2 Memory Organization MEMORY HIERARCHY Register Cache Main Memory Magnetic Disk Magnetic Tape Memory Hierarchy is to obtain the highest possible access speed while minimizing the total cost of the memory system Memory Hierarchy Magnetic tapes Magnetic disks I/O processor CPU Main memory Cache memory Auxiliary memory Registers Cost Speed
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3 Memory Organization MAIN MEMORY RAM and ROM Chips Typical RAM chip Chip select 1 Chip select 2 Read Write 7-bit address CS1 CS2 RD WR AD 7 128 x 8 RAM 8-bit data bus CS1 CS2 RD WR 0 0 x x 0 1 x x 1 0 0 0 1 0 0 1 1 0 1 x 1 1 x x Memory function Inhibit Inhibit Inhibit Write Read Inhibit State of data bus High-impedance High-impedance High-impedance Input data to RAM Output data from RAM High-impedance Typical ROM chip Chip select 1 Chip select 2 9-bit address CS1 CS2 AD 9 512 x 8 ROM 8-bit data bus Main Memory
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4 Memory Organization MEMORY ADDRESS MAP RAM 1 RAM 2 RAM 3 RAM 4 ROM 0000 - 007F
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CH12 - Memory Organization MEMORY ORGANIZATION Memory...

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