# lecture16 - ago • Gates truth tables MSI devices etc –...

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State Machine Data Path X, Y, Z Zero A[3:0] B[3:0] Out[7:0] Go Done 4-bit Multiplier

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RS: 8-bit register RB: 4-bit register 0 1 0000 A[3:0] B[3:0] 4 4 4 8 0000000 8-bit Adder RA: 8-bit register Shift Registers shift A 0 into the “open” spot. Out[7:0] Bob 8 8 8 8 X Y Z For RA and RB 0 Hold 1 Load 2 Shift Right 3 Shift Left RB[0] RB=zero? zero For RS 0 Load 1 Clear 2 Hold 3 Shift Left
Waiting X= Y= Z= Done= G is Go Z is Zero _______ X= Y= Z= Done= _______ X= Y= Z= Done= _______ X= Y= Z= Done= _______ X= Y= Z= Done=

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CLK Start X Y Z Bob RA RB RS
CLK Start X Y Z Bob RA RB RS

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Taking stock Where are we? We finished combinational logic design a few weeks

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Unformatted text preview: ago. • Gates, truth tables, MSI devices, etc. – We’ve almost finished sequential logic design. • Flip-flops, registers, state machine design etc. • Some to do: – Mealy vs. Moore – Memories • Next up is optimization – How do we simplify combinational logic? – How do we reduce the number of states? Let’s finish up the rest… • We’ll probably need most/all of next Monday too. Mealy vs. Moore “11” Mealy vs. Moore “11”...
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lecture16 - ago • Gates truth tables MSI devices etc –...

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