FA01-exam1-sol

FA01-exam1-sol - UNIVERSITY OF CALIFORNIADAVIS DEPARTMENT...

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UC Davis 1 Hussain Al-Asaad U NIVERSITY OF C ALIFORNIA —D AVIS D EPARTMENT OF E LECTRICAL & C OMPUTER E NGINEERING EEC180A—D IGITAL S YSTEMS I F ALL 2001 M IDTERM I S TUDENT I NFORMATION I NSTRUCTIONS The exam is closed book and notes. Print your name and your ID number. Circle your lab section number(s). There are five problems in the exam. Solve all of them and show your work. If you need more space for your solution, use the back of the sheets. E XAM G RADE Name Hussain Al-Asaad ID Number xx-xxx-xxxx Lab Section Registered A01 (M 7-11pm) A02 (T 7-11pm) A03 (W 7-11pm) A04 (R 7-11pm) A05 (F 7-11pm) A06 (M 7-11am) A07 W 7-11am) Attending A01 (M 7-11pm) A02 (T 7-11pm) A03 (W 7-11pm) A04 (R 7-11pm) A05 (F 7-11pm) A07 (W 7-11am) None Problem Maximum Points Student Score 12 0 2 0 22 0 2 0 32 0 2 0 42 0 2 0 52 0 2 0 Total 100 100
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UC Davis 2 Hussain Al-Asaad 1. K ARNAUGH M APS (8 + 4 + 3 + 5 = 20 POINTS ) Consider the function . 1.1 List all prime implicants of F . An empty karnaugh map is drawn for you. 1.2 List all essential prime implicants of F . 1.3 Write the minimum sum of products expression for F . 1.4 Implement the function F using only three logic gates. 2. T IME D IAGRAM (20 POINTS ) Complete the timing diagram for the circuit below. Assume that the delay of the gates G 1 and G 2 is 4 and 3, respectively. Two timing diagrams are drawn in case you need more than one.
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This note was uploaded on 04/25/2011 for the course EEC 180A taught by Professor Redinbo during the Spring '08 term at UC Davis.

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FA01-exam1-sol - UNIVERSITY OF CALIFORNIADAVIS DEPARTMENT...

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