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Unformatted text preview: UNIVERSITY OF CALIFORNIA—DAVIS
DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING EEC180A—DIGITAL SYSTEMS I
SPRING 2010 EXAM II STUDENT INFORMATION
Name
ID Number INSTRUCTIONS The exam is closed book and notes. A single doublesided cheat sheet is allowed.
Print your name and your ID number. There are four problems in the exam. Solve all of them and show your work. If you need more space for your solution, use the back of the sheets. EXAM GRADE Maximum Student Problem Points Score
1 25
2 25
3 25
4 25
Total 100 1. ARITHMETIC CIRCUITS (15 + 10 = 25 POINTS) Let X be a 3bit unsigned number represented by XZX 1X0 and let Y be a 3bit unsigned number
represented by YZYI Y0. Moreover, let Z be a 9bit unsigned number represented by
ZgZ7Z6ZSZ4Z3ZZZlZO. Assume that we only have an 8bit adder (shown below). 1.1 Show how we can implement the function Z = 17X + 18Y + 10 using the adder. HHHHHHHH 1.2 Determine the equation of Z in terms of X for the circuit shown below. X2 X2 X1X1 XoXo X2 X2 X1X1 X0 X0 X2 X2X1 X1 HHHHHHHH  2. FLIPFLOPS (5 + 6 + 6 + 8 = 25 POINTS) Consider a new type of a negative edgetriggered ﬂipﬂop that we call the AB ﬂipﬂop. The characteristic equation of the AB ﬂipﬂop is Q = A(B + Q). Moreover, the mode AB = 01 is
forbidden (not allowed). 2.1 Complete the table below.
A Q B Q
A 2.3 Implement the AB ﬂipﬂop using an RS ﬂipﬂop and logic gates. 2.4 Using AB ﬂipﬂops, design a counter that counts 1, 2, 3, and repeat. 3. COUNTER DESIGN (15 + 4 + 6 = 25 POINTS) 3.1 Using T ﬂipﬂops, design a counter (C) that counts in the following sequence: 1, 4, 6, 3, and
repeat. Draw the schematic of your ﬁnal design. 3.2 Is the resulting counter C self starting? 3.3 By using the counter C and a single inverter, can we design a counter that counts in the
sequence 3, 6, 4, l, and repeat? 4. COUNTER CLASSIFICATION (25 POINTS) Let us deﬁne a complete counter as a counter that counts all of its states in a ﬁxed order. In
other words, all the possible states are part Of the counting sequence. For example, a 3bit up
binary counter is a complete counter since it counts through all of its eight states. On the other
hand, a 3bit Johnson counter is not complete since it counts through only six out of the possible eight states.
Suppose that we know the following information about the counter shown below: 0 The counter is a complete counter.
 If the current state Of the counter is QZQIQO = 010, then the next state Of the counter is 111. Design the combinational circuit C using the minimum number of logic gates. Also, draw the
state diagram Of the counter (Use the order Of QZQIQO in labeling the states). ...
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 Spring '08
 REDINBO

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