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Unformatted text preview: CMPT 150 Sequential Circuits Page 5 Edge-triggered Flip-Flops b The most common way to build a synchronized FF is to have an edge-triggered FF. b Flip-flop latches on rising (falling) edge of clock b Rising edge is called positive, falling edge is called negative b FF holds value until clock starts next rise (or fall for negative) b Timing diagrams: CMPT 150 Sequential Circuits Page 6 Flip-flop Excitation Table b An Excitation table tells you what input you need to supply for a desired transition from state to state b Useful when designing circuits using flip-flops b E.g. the excitation tables for the flip-flops weve seen: Q(t) Q(t+1) D 0 0 1 1 1 1 Q(t) Q(t+1) S R 0 0 1 1 1 1 Q(t) Q(t+1) T 0 0 1 1 1 1 Q(t) Q(t+1) J K 0 0 1 1 1 1...
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- Spring '08
- Flip-flops, Sequential Circuits, The Signal, State transition table