lecture23 - Recall: Tri-State Gates b A tri-state gate has...

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CMPT 150 Registers Page 1 Connecting registers to each other b Remember that RTL micro-operations involve moving data between registers and/or memory b Implementing micro-operations requires connections among the referenced registers and memory locations b One option is to make each connection in an ad-hoc manner: b CMPT 150 Registers Page 2 The Bus b A bus is an n-bit data highway b With on and off ramps for every register b Registers share same wires for all connections R0 b We want the bus to behave as follows: b Only one register can output at a time b Zero or more inputs can be active at once R1 R2 R3 CMPT 150 Registers Page 3 Implementing a Bus b We can implement an 8-bit bus using a mux: R0 R1 Eightuple x1 S 0 S 1 b Notice: b Only one registers data appears on the bus at one time b Zero or more registers can read the data on the bus R2 R3 4x1 Mux CMPT 150 Registers Page 4
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Unformatted text preview: Recall: Tri-State Gates b A tri-state gate has three “values” b Output is zero, one, or nothing b Nothing means open circuit (i.e. high impedance) b Tri-state buffer b One data input and one control input b If C=1 then output = input b If C=0 then output = disconnected CMPT 150 Registers Page 5 Tri-state Bus b We can implement a bus using tri-state buffers as follows: 2x4 Dec S S 1 CMPT 150 Registers Page 6 RTL and the Bus b Transferring to and from the bus can be done explicitly b We can treat the bus as a globally-connected register called “BUS” b E.g. write A b B as: b If the bus is known to exist, we can use it implicitly b I.e. we can just write A b B b Are the following expressions legal with a single shared bus?: A b B, C b B A b B, B b C A b B, B b A...
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This note was uploaded on 04/27/2011 for the course CMPT 150 taught by Professor Dr.anthonydixon during the Spring '08 term at Simon Fraser.

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lecture23 - Recall: Tri-State Gates b A tri-state gate has...

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