January 29, 1998
WITH HSPICE – A
Charles R. Kime
Dept. of Electrical and Computer Engineering
University of Wisconsin – Madison
A SPICE (HSPICE) simulation has three primary steps:
1) Generating the circuit netlist file,
2) Running the simulation, and
3) Displaying, analyzing, and printing the simulation results.
In this tutorial, we will carry out these three steps for an implementation of an Exclusive
OR gate made up of four NAND gates. Since this is a digital circuit, digital electronic
circuit simulation techniques are used rather then analog techniques used in other elec-
tronics courses. Some differences are:
1) Input waveforms: DC, PWL (Piece-Wise Linear) PULSE versus
AC, DC, SIN, EXP.
2) Analysis: DC and TRAN vs. OP, AC, FOUR, NOISE,
3) Circuit Elements: V, F(I-controlled I source), C, R,
M(MOSFET), Q(BJT), T(Lossless line), U(Uniform RC line).
The EXOR gate will be hierarchical – made of 4 NAND gates – as shown in Figure 1a).
The logic and circuit design has been completed. In addition, we have enough of a lay-
out to estimate the areas and perimeter of the sources and drains and the capacitive load-
ing on the circuit within an IC.