L19-AssemblyLang

L19-AssemblyLang - Spring 2009 ECE 18-240 Structure and...

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Spring 2009 ECE 18-240 Structure and Design of Digital Systems LEC 19: ISA: Assembly Language Bill Nace & Don Thomas Electrical & Computer Engineering Carnegie Mellon University LEC 19 SPR09 18-240 LEC18 — 18-240: Where are we. ..? ! 2 Handouts: Lec19 and Example Exam " HW5 is due Friday, as are Lab 3 reports " Recitation: HW Quiz 2 Midterm2 is still approaching! It won’t go away! Get ready! Study!
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F09 18-240 L19 -- ISA: Assembly Language ! What you know so far… " Stored Program Processor Architecture " Instruction Set Architecture Design " P18240 Instruction Set Specification (Our Assembly Language) " The Compiler Task ! SW Specification # Assembly Code ! This Lecture " The Assembler Task ! Assembly Code # Machine Language " P18240 Machine Language (Our Machine Language) " P18240 Assembler (Our Assembler) ! To Come " Assembly programming and hardware design of the P18240 3 F09 18-240 L19 -- Buzzword Summary (Again. ..) : Specification of the processor state and behavior as “visible” to programmer : Instructions available to prog., specified as: Assembly Language : Symbolic format Machine Language : 1’s and 0’s in a memory : Specifies a processor’s architecture by its available instruction set Tools : High-Level SW # Assembly Language : Assembly Language # Machine Language : Loads Machine Language to Processor Memory 4
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The Big Picture x = 0; if (y == 1) x = 1; Software in high-level language Processor Real HW Assembly Language Interpretation of SW Compiler Assembler Memory of 1’s & 0’s R0 R1 R2 R3 R4 R5 R6 R7 PC SP general purpose registers special purpose registers ALU Z N C V condition codes Data [15:0] Address[15:0] (16 bit words) b15 . .. b0 0000 0001 0002 0003 0004 FFFC FFFD FFFE FFFF Memory P18240 Processor F09 18-240 L19 -- Assembly Instruction Fields ! Instruction must be encoded in 1’s and 0’s ! P18240 is a 2 operand machine " Can specify 2 operands per instruction " Usually the place you GET data is called the SOURCE operand " ... the place you WRITE data is the DESTINATION operand ! Examples " LDA Rd, addr ; means Rd Mem[addr] " STA addr, Rs ; means Mem[addr] Rs ! Motivation " In high level language you write: dest = dest + source " So, in P18240 ASM, we write: OP dest, source " May (will) be different in other assembly languages ASM Instruction ex: LDA R4, $0100 6
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F09 18-240 L19 -- Machine Language Specification Operand Specification: 0, 1, or 2 registers (3 bits each) 0 or 1 memory address / immediate (16 bits) 10-bit opcode that uniquely determines what the instruction does in processor 3-bit register addresses (000 … 111) to specify R0 - R7 When an instruction needs an actual memory address or a 16-bit data word it goes in the next memory address 7 15 6 5 4 3 2 1 0 addr X opcode ra rb 15 6 5 4 3 2 1 0 addr X opcode ra rb X+1 address or data ! Recall " Each assembler instruction “assembles” into some words that get loaded into memory " Addressing Mode = where to look to find the data " Instruction Format = what the bits of the assembled words look like !
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L19-AssemblyLang - Spring 2009 ECE 18-240 Structure and...

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