23_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

23_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
xxii Preface to know; it is not simply for graduate students and researchers. It focuses more on basic VLSI test concepts, principles, and DFT architectures and includes the latest advances that are in practice today, including at-speed scan testing , test compres- sion , at-speed built-in self-test (BIST), memory built-in self-repair (BISR), and test technology trends . These advanced subjects are key to system-on-chip (SOC) designs in the nanometer age. The semiconductor testing field is quite broad today, so the scope of this textbook is also broad, with topics ranging from digital to memory to AMS (analog and mixed- signal) testing . This book will allow the readers to understand fundamental VLSI test principles and DFT architectures and prepare them for tackling test problems caused by advances in semiconductor manufacturing technology and complex SOC designs in the nanometer era. Each chapter of this book follows a specific template format. The subject matter of the chapter is first introduced, with a historical perspective provided, if needed. Then, related methods and algorithms are explained in sufficient detail while keep-
Background image of page 1
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

Ask a homework question - tutors are online