46_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

46_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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Introduction 15 test vectors; however, test vectors generated using the stuck-at fault model do not necessarily guarantee the detection of all possible defects, so other fault models are needed. 1.3.2.2 Transistor Faults At the switch level, a transistor can be stuck-open or stuck-short , also referred to as stuck-off or stuck-on , respectively. The stuck-at fault model cannot accurately reflect the behavior of stuck-open and stuck-short faults in CMOS logic circuits because of the multiple transistors used to construct CMOS logic gates. To illustrate this point, consider the two-input CMOS NOR gate shown in Figure 1.8. Suppose transistor N 2 is stuck-open. When the input vector AB = 01 is applied, output Z should be a logic 0, but the stuck-open fault causes Z to be isolated from ground (V SS ). Because transistors P 2 and N 1 are not conducting at this time, Z keeps its previous state, either a logic 0 or 1. In order to detect this fault, an ordered sequence of two test vectors AB = 00
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