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Unformatted text preview: a four-wire serial bus interface (summarized in Table 1.5) in conjunction with instructions transmitted over the interface. In addition to testing the interconnec-tions on the PCB, the boundary scan interface also provides access to DFT features, such as LSSD or BIST, designed and implemented in the VLSI devices for board and system-level testing. The boundary scan description language (BSDL) pro-vides a mechanism with which IC manufacturers can describe testability features in Input data to IC capture FF Capture update FF Update Input Scan In Shift Scan Out Output Input BS Cell Control BS Cell Pad Output BS Cell 1 1 ± FIGURE 1.15 Basic boundary scan cell applied to a bidirectional buffer. TABLE 1.5 ± Boundary Scan Four-Wire Interface BS pin I/O Function TCK Input Test clock TMS Input Test mode select TDI Input Test data in TDO Output Test data out...
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.
- Spring '08