78_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

78_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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Design for Testability 47 (a) (b) 2 /4/0 1/1/3 1/1/3 1/1/3 0.5/0.5/0.25 0.875/0.125/1 0.5/0.5/0.25 0.5/0.5/0.25 ± FIGURE 2.3 Comparison of SCOAP and probability-based testability measures: (a) SCOAP combinational measures, and (b) probability-based measures. measures and probability-based testability measures of a three-input AND gate. The three-value tuple v 1 / v 2 / v 3 of each signal line represents the signal’s 0-controllability ( v 1 ), 1-controllability ( v 2 ), and observability ( v 3 ). Signals with poor probability-based testability measures tend to be difficult to test with random or pseudo-random test patterns. The faults on these signal lines are often referred to as random-pattern resistant (RP-resistant) [Savir 1984]. That is, either the probability of these signals randomly receivinga0or1 from primary inputs or the probability of observing these signals at primary outputs is low, assuming that all primary inputs have the equal probability of being set to 0 or 1 and are independent from each other. The existence of such RP-resistant faults is the main reason why fault coverage
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