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Test Generation 169 4.4 DESIGNING A STUCK-AT ATPG FOR COMBINATIONAL CIRCUITS In deterministic ATPG algorithms, there are two main tasks. The first is to excite the target fault, and the second is to propagate the fault-effect to a primary out- put. Because the logic values in both the fault-free and faulty circuits are needed, composite logic values are used. For each signal in the circuit, the values v/v f are needed, where v denotes the value for the signal in the fault-free circuit, and v f represents the value in the corresponding faulty circuit. Whenever v = v f , v is suf- ficient to denote the signal value. To facilitate the manipulation of such composite values, a 5-valued algebra was proposed [Roth 1966], in which the five values are 0, 1, X , D , and D ;0 ,1 ,and X are the conventional values found in logic design for true, false, and “don’t care.” D represents the composite logic value 1/0 and
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Unformatted text preview: the 5-valued algebra as well. The simplest way to perform Boolean operations is to represent each composite value into the v/v f form and operate on the fault-free value first, followed by the faulty value. For example, 1 AND D is 1/1 AND 1/0. AND-ing the fault-free values yields 1 AND 1 = 1, and AND-ing the faulty values yields 1 AND 0 = 0. So the result of the AND operation is 1 / = D . As another example, D OR D = 1 / 0 OR 0 / 1 = 1 / 1 = 1 Tables 4.1, 4.2, and 4.3 show the AND, OR, and NOT operations for the 5-valued algebra, respectively. Operations on other Boolean conjunctives can be constructed in a similar manner. 4.4.1 A Naive ATPG Algorithm A very simple and naive ATPG algorithm is shown in Algorithm 1, where combina-tional circuits with fanout structures can be handled. TABLE 4.1 ± AND Operation AND 1 D D X 1 1 D D X D D D X D D D X X X X X X...
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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