82_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

82_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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Design for Testability 51 2.3.1 Ad Hoc Approach The ad hoc approach involves using a set of design practice and modification guidelines for testability improvement. Ad hoc DFT techniques typically involve applying good design practices learned through experience or replacing a bad design practice with a good one. Table 2.5 lists some typical ad hoc techniques. In this subsection, we describe test point insertion, which is one of the most widely used ad hoc techniques. A few other techniques are further described in Section 2.6. Additional ad hoc techniques can be found in [Abramovici 1994]. TABLE 2.5 ± Typical Ad hoc DFT Techniques A1 Insert test points A2 Avoid asynchronous set/reset for storage elements A3 Avoid combinational feedback loops A4 Avoid redundant logic A5 Avoid asynchronous logic A6 Partition a large circuit into small blocks 2.3.1.1 Test Point Insertion Test point insertion (TPI) is a commonly used ad hoc DFT technique for improv- ing the controllability and observability of internal nodes. Testability analysis is
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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