84_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

84_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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Design for Testability 53 to add a scan point , which is a combination of a control point and an observation point, instead of a control point, as this allows us to observe the source end as well. Some other test point designs are described in [Abramovici 1994] and [Nadeau- Dostie 2000]. In addition, test points can be shared among multiple internal nodes; for example, a network of XOR gates can be used to merge a few low-observability nodes together to share one observation point. This can potentially reduce the area overhead, although in some cases it might increase routing difficulty. 2.3.2 Structured Approach The structured DFT approach attempts to improve the overall testability of a circuit with a test-oriented design methodology [Williams 1983] [McCluskey 1986]. This approach is methodical and systematic with much more predictable results. Scan design, the most widely used structured DFT methodology, attempts to improve testability of a circuit by improving the controllability and observability of
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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