Design for Testability67the target fault coverage goal. In addition, partial-scan design offers less supportfor debug, diagnosis, and failure analysis.2.5.3Random-Access Scan DesignFull-scan design and partial-scan design can be classified asserial scan design, astest pattern application and test response acquisition are both conducted seriallythrough scan chains. The major advantage of serial scan design is its low routingoverhead, as scan data is shifted through adjacent scan cells. Its major disadvan-tage, however, is that individual scan cells cannot be controlled or observed withoutaffecting the values of other scan cells within the same scan chain. High switchingactivities at scan cells can cause excessive test power dissipation, resulting in cir-cuit damage, low reliability, or even test-induced yield loss.Random-access scan(RAS) attempts to alleviate these problems by making each scan cell randomly anduniquely addressable, similar to storage cells in arandom-access memory(RAM).
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Serial Peripheral Interface Bus, Automatic test pattern generation, Scan chain, Design For Test, scan cells