98_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES

98_pdfsam_VLSI TEST PRINCIPLES & ARCHITECTURES -...

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Design for Testability 67 the target fault coverage goal. In addition, partial-scan design offers less support for debug, diagnosis, and failure analysis. 2.5.3 Random-Access Scan Design Full-scan design and partial-scan design can be classified as serial scan design ,as test pattern application and test response acquisition are both conducted serially through scan chains. The major advantage of serial scan design is its low routing overhead, as scan data is shifted through adjacent scan cells. Its major disadvan- tage, however, is that individual scan cells cannot be controlled or observed without affecting the values of other scan cells within the same scan chain. High switching activities at scan cells can cause excessive test power dissipation, resulting in cir- cuit damage, low reliability, or even test-induced yield loss. Random-access scan (RAS) attempts to alleviate these problems by making each scan cell randomly and uniquely addressable, similar to storage cells in a random-access memory
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This note was uploaded on 05/16/2011 for the course ENGINEERIN mp108 taught by Professor Elbarki during the Spring '08 term at Alexandria University.

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